MIPI D-PHY to CMOS Interface Bridge

Important: For new designs, Lattice recommends using the following modular IP blocks to implement this function:

Many traditional processors have a CMOS interface. However, many innovations in mobile image sensor technology have been developed in recent years and most of these sensors have MIPI CSI-2 interfaces. Many new applications want to leverage mobile innovations while utilizing traditional processors with specific requirements and capabilities.

Lattice CrossLink is a programmable video interface bridging device capable of converting image sensors with MIPI CSI-2 interface to CMOS at up to 6 Gbps. This bridge is available as free IP is available in Lattice Diamond for allowing easy configuration and setup.


  • Supports MIPI DSI and MIPI CSI-2 Outputs up to 6 Gbps
    • 1, 2 or 4 Data Lanes
  • Supports parallel MIPI DPI, CMOS, RAW and RGB interfaces at over 150 Mhz
  • Supports CSI-2 compatible video formats (RAW, RGB, and YUV) :
    • 8-bit YUV420/422
    • 10-bit YUV420/422
    • 8-bit RAW8
    • 10-bit RAW10
    • 12-bit RAW12
    • 24-bit RGB888
  • Supports DSI compatible video formats (RGB) :
    • RGB888
    • RGB666
  • Compliance with MIPI D-PHY Specification v1.1
  • Compliance with DSI and CSI-2 Specification v1.1

Block Diagram


Quick Reference
MIPI D-PHY to CMOS Interface Bridge Soft IP User Guide
FPGA-IPUG-02004 1.4 5/10/2019 PDF 2.3 MB

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