I3C Target IP Core

Monitors I3C Bus for Relevant I3C Commands Sent by the I3C Controller

Related Products

Related Applications


Newsletter Subscription

The Lattice I3C IP Core is designed to comply with the MIPI I3C specification. Both Controller and Target versions of this IP Core are available.

The I3C Target listens to I3C bus for relevant I3C commands sent by the I3C Controller and responds accordingly. This includes all Broadcast Commands (CCC), and any Directed Commands (CCC) addressed specifically to that I3C Target Device and supported by that I3C Target Device. The I3C Target IP accepts commands from LMMI or from the optional APB/AHB-Lite interface. These commands are decoded into (1) configurations for the I3C Target that may be requested by the Controller and (2) I3C signals that the Target may transmit to the I3C bus.

Eases Sensor System Design Architectures - The MIPI I3C interface eases sensor system design architectures in mobile wireless products by providing a fast, low-cost, low-power, two-wire digital interface for sensors. I3C a single scalable, cost effective, power efficient protocol to solve issues with the high protocol overhead, power consumption, nonstandard protocol, separate lines for interrupt and the rest requirement.

Offers Greater Than 10x Speed Improvements - I3C offers greater than 10x speed improvements, more efficient bus power management, new communication Modes, and new Device roles, including an ability to change Device Roles over time

Supports Several Communication Formats - I3C Target IP supports several communication formats, all sharing a two-wire interface: SDA bidirectional data line and SCL input.

Features

  • Two-wire serial interface up to 12.5 MHz using Push-Pull
  • Legacy I2C Device co-existence on the same Bus (with some limitations)
  • Dynamic Addressing
  • I2C-like Single Data Rate messaging (SDR)
  • In-Band Interrupt and Hot-Join support

Block Diagram

I3C Target Block DiagramExpand Image

Resource Utilization

LFCPNX-100-7ASG256C
Configuration clk Fmax (MHz) Registers LUTs EBRs DSPs
Default 104.26 725 1887 2 0
IBI Capable = False 95.22 660 1637 2 0
Hot-Join Capable = False 99.25 707 1842 2 0
IBI Capable = False,
Hot-Join Capable = False 		100.17 627 1499 2 0

1. Fmax is generated when the FPGA design only contains the SDR module, and the target frequency is 200 MHz. These values may be reduced when user logic is added to the FPGA design.
2. The distributed RAM utilization is accounted for in the total LUT4s utilization. The actual LUT4 utilization is distribution among logic, distributed RAM, and ripple logic.

LIFCL-40-7BG256I
Configuration clk Fmax (MHz) Registers LUTs EBRs DSPs
Default 88.44 756 1832 2 0
IBI Capable = False 91.79 699 1555 2 0
Hot-Join Capable = False 98.16 707 1842 2 0
IBI Capable = False,
Hot-Join Capable = False 		91.56 627 1499 2 0

1. Fmax is generated when the FPGA design only contains the SDR module, and the target frequency is 200 MHz. These values may be reduced when user logic is added to the FPGA design.
2. The distributed RAM utilization is accounted for in the total LUT4s utilization. The actual LUT4 utilization is distribution among logic, distributed RAM, and ripple logic.

Ordering Information

Device Family Part Numbers
Single Design Multi-Site Subscription
MachXO5-NX I3C-S-XO5-U I3C-S-XO5-UT I3C-S-XO5-US
CertusPro-NX I3C-S-CPNX-U I3C-S-CPNX-UT I3C-S-CPNX-US
Certus-NX I3C-S-CTNX-U I3C-S-CTNX-UT I3C-S-CTNX-US
CrossLink-NX I3C-S-CNX-U I3C-S-CNX-UT I3C-S-CNX-US

To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

Purchase: To find out how to purchase the IP Core, please contact your local Lattice distributor or sales representative.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
I3C Target IP Core - Lattice Radiant Software
FPGA-IPUG-02227 1.1 7/27/2023 PDF 902.3 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

ABOUT LATTICE

SALES

SUPPORT

FOLLOW