I3C Target IP Core

Monitors I3C Bus for Relevant I3C Commands Sent by the I3C Controller

The Lattice I3C Target IP core supports several communication formats, all sharing a two-wire interface: SDA bidirectional data line and SCL bidirectional clock. It monitors the I3C bus for relevant I3C commands sent by the I3C Controller and responds accordingly. Also, this IP accepts commands from LMMI or from the optional APB/AHB-Lite interface.

The Lattice I3C IP is designed to comply with the MIPI I3C specification. The MIPI I3C interface eases sensor system design architectures in mobile wireless products by providing a fast, low-cost, low-power, two-wire digital interface for sensors. I3C protocol is a single scalable, cost effective, and a power efficient protocol. Implementing the I3C specification greatly increases the implementation flexibility for an ever-expanding sensor subsystem as efficiently and at as low cost as possible.

Resource Utilization details are available in the IP Core User Guide.

Features

  • Compatible with MIPI I3C Specification v1.1.1
  • Two-wire serial interface up to 12.5 MHz using Push-Pull
  • Legacy I2C device co-existence on the same bus (with some limitations)
  • Dynamic Addressing with optional Static Addressing for I3C Target acting as I2C Target
  • I2C -like SDR messaging

Block Diagram

Ordering Information

  Part Number
Device Family Single Seat Perpetual Single Seat Annual
Certus-N2 I3C-S-CN2-UT I3C-S-CN2-US
Avant-G I3C-S-AVG-UT I3C-S-AVG-US
Avant-X I3C-S-AVX-UT I3C-S-AVX-US
Avant-E I3C-S-AVE-UT I3C-S-AVE-US
CertusPro-NX I3C-S-CPNX-UT I3C-S-CPNX-US
CrossLink-NX I3C-S-CNX-UT I3C-S-CNX-US
MachXO5-NX I3C-S-XO5-UT I3C-S-XO5-US
Certus-NX I3C-S-CNX-UT I3C-S-CNX-US
iCE40 UltraPlus I3C-S-UP-UT I3C-S-UP-US
Bundled MIPI-BUNDL-UT MIPI-BUNDL-US

To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

Purchase: To find out how to purchase the IP Core, please contact your local Lattice distributor or sales representative.

Documentation

Quick Reference
Information Resources
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I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
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I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
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I3C Target IP Core - User Guide
FPGA-IPUG-02227 1.5 7/15/2025 PDF 2 MB
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I3C Target IP Core - Release Notes
FPGA-RN-02018 1.1 7/15/2025 PDF 219.9 KB

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