[Blog] How Small FPGAs Can Make a Big Impact

As with many types of devices, it’s easy to fall into the trap that bigger chips are better and more impactful than smaller semiconductor devices. In the case of FPGAs (Field Programmable Gate Arrays) however, it’s often the smaller versions that have the largest range of applications and the most influence.

Small FPGAs are used across a huge range of devices, applications, and industries because they reliably perform critical functions that are essential to the speedy operation of many different types of intelligent systems. Equally important, because of their programmable nature, they can be easily customized for the specific requirements of different types of devices.

Lattice Semiconductor has taken advantage of the unique capabilities of small FPGAs for many years now and built a roughly $0.5 Billion-dollar annual business around them. Recently, the company unveiled a second-generation version of their small FPGA architecture. The Lattice Nexus™ 2 platform, which is built on a 16nm TSMC FinFET manufacturing process, offers several important advantages that come along with the smaller process node. In particular, chips based on Nexus 2 function at optimal power and higher speeds than competitive offerings from other vendors, and they do so in a smaller physical size.

In addition, Lattice has integrated more and faster connectivity options and enhanced security standard support into the Nexus 2 platform. On the connectivity front, Nexus 2 supports multi-protocol 16G SERDES via an integrated PCIe Gen 4 controller and MIPI D and C-PHY speeds up to 7.98 Gbps. The platform also enables the use of high-speed LPDDR4 memory, allowing faster overall system performance options.

For security, Nexus 2 includes support for the 256-bit AES-GCM and SHA3-512 standards and is compliant with FIPS 140-3 Level 2, all of which means that devices which incorporate the chips can be security hardened to the point where they can be used in sensitive and mission critical environments. In addition, because FPGAs like these are often placed in devices with long lifetimes, the fact that the Nexus 2 platform is post-quantum ready can provide system designers with a sense of relief, knowing that the devices will be ready for even future potential security challenges.

The first implementation of the Nexus 2 platform is in the Lattice Certus™-N2 family of general-purpose FPGAs, which are now sampling with a variety of Lattice customers. In addition, Lattice has upgraded their Lattice Propel and Lattice Radiant Design software tools to support these new chips so that system designers can begin their work customizing them for their specific needs.

With these new capabilities, the Certus-N2 chips will be able to offer new levels of performance in existing applications as well as a range of opportunities for new applications. On a practical level, for example, power efficiency can be up to 3X better than competitive offerings, which translates to less power usage, more reliable operation and, in battery-powered environments, longer run times.

The performance enhancements of the new platform come in several different ways. First, the faster bandwidth connections across SERDES, DRAM, flash and PCI all allow the system to work more efficiently and enable connections to higher data rate peripherals. It’s also a key reason why the Nexus 2 FPGAs can boot significantly faster (up to 20X) than some competitive offerings.

Because FPGAs often play the role of intermediaries between sensors and compute as well as providing points of interconnect within larger systems, these new capabilities create opportunities for new types of applications. For example, in modern car designs with zonal architectures, the need for speedy, reliable interconnect between these zones is essential. Plus, the Certus-N2’s ability to wake almost instantaneously can make a dramatic difference in responding to external trigger data when it comes to a moving car. Similar applications become possible in environments with high-speed motor control robots—such as manufacturing—as well.

Other key architectural benefits of Nexus 2 include up to 2X the number of customizable logic cells versus first generation Nexus parts and more than 3X the number of DSP cores up to a maximum of 520. Together, these capabilities allow more advanced algorithms to run, opening the potential to improve the accuracy and speed for edge inferencing applications, such as human or object presence detection, image or audio recognition, and more.

While the applications may not be as widely discussed as the workloads heading to today’s latest GPUs, the critical nature of the tasks that small FPGAs handle make them an absolutely essential part of a huge range of today’s devices. Controlling boot processes, connecting sensors to compute, running time-sensitive specialized algorithms, and many more of the things that small FPGAs enable are at the core of how advanced systems operate.

Just as the types of higher-level capabilities that today’s most advanced devices use continue to evolve, so do the demands for the chips supporting these fundamental operations. That’s why advancing the capabilities of something like the Nexus line of small FPGAs represents such an important and widely impactful step towards powering the next generation of advanced systems.

Bob O’Donnell is the president and chief analyst of TECHnalysis Research, LLC a market research firm that provides strategic consulting and market research services to the technology industry and professional financial community. You can follow him on X @bobodtech.