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Power Management using a Control PLD with on-chip ADC

Power Management using a Control PLD with on-chip ADC
Posted 05/09/2017 by Shyam Chandra

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In this 6 part series we are looking at the challenges of implementing an efficient power management architecture in today’s complex circuit board designs.

In our 5th post, we will look at one final attempt to develop an efficient power management solution for a modern circuit board. In this model we have come full circle. The control PLD is back in charge of all power management functions. But in order to overcome issues with inaccurate “Power Good” signals, it has been upgraded with an on-chip digital converter (ADC), which monitors the board's supply voltages. Here, the control PLD implements the power management functions using an on-chip soft/hard processor core, while housekeeping functions are implemented in hard logic.

A Hardware Management System Using a Control PLD with an On-chip ADC
A Hardware Management System Using a Control PLD with an On-chip ADC


  • Easy scalability and adaptation for other designs.
  • The combination of power management and housekeeping functions reduces design time.
  • Provides voltage telemetry to a remote system manager.


  • Requires a larger CPLD with higher density and I/O pin count.
  • Complex CPLD increases solution cost.
  • Routing low-voltage analog telemetry to a single location increases circuit board congestion.
  • Forces a digital engineer to implement power management function, as well as digital control functions.

While this design resolves the fault detection inaccuracies of the first design, and retains some of the benefits of the other two hybrid designs, it still suffers from board congestion and requires a complex Control PLD. The logic resources needed for power management are significantly higher, as the logic has to manage 12-bit vectors as opposed to single bit “Power Good” signals.

Which brings us to our final blog. Don’t miss out on learning about a new Power Manager Design Architecture that shows the highest potential to eliminate design engineer headaches.

Read all blogs from our from our Power Manager series:

Click on the links to learn more about our power manager products and development kits and boards.