Interface - Wearables

Related Products

Are you constrained by I/O limitations of your application processor? Lattice FPGAs can help. Add what you need, the way you need it by using Lattice FPGAs.

Flexibility - Lattice FPGAs support numerous I/O standards that provide the flexibility to interface with a wide range of sensors, memory, panels etc. Use Lattice FPGAs for low cost, low power instant innovation.

I/O rich FPGAs - Lattice FPGAs are designed with multiple I/O banks each capable of supporting independent I/O voltages, ideal for GPIO I/O expansion

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Block Diagrams

SPI to MIPI D-PHY Bridge Block DiagramExpand Image

SPI to MIPI DSI

  • Lowest power FPGA with MIPI D-PHY support on the market
  • Using only 3.1K Logic Cells, 1 PLL, and 6x DSP blocks, users can now implement our MIPI D-PHY IP to directly connect and bridge SPI to MIPI CSI2 or SPI to MIPI DSI
  • With the addition of smart memory within iCE40UltraPlus, you can also buffer full or partial frames for a variety of user scenarios. One such scenario is multi-layer graphics acceleration
Parallel to color sequential display bridgeExpand Image

Parallel to color sequential display bridge

  • Does your wearable device AP not support color sequential displays?  Use Lattice FPGAs to convert the parallel RBG stream to color sequential R,G & B data required by the display
  • Lattice FPGAs support several interface standards and protocols such as LVDS, parallel RGB, MIPI DSI, etc. to meet your unique bridging requirements
Always-on controller and display bridgeExpand Image

Always-on controller and display bridge

  • Use low power & small form factor Lattice FPGAs to implement always on wearable display functionality while still meeting your system’s power budget
  • Lattice FPGAs include integrated oscillators & PLLs that can be used to implement other custom features on demand
I/O level shifter and auto time calibrationExpand Image

I/O level shifter and auto time calibration

  • Lattice FPGAs include multiple I/O banks with independent voltage-level control to create custom voltage-level translator bridge solutions

Documents

Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Semiconductor's Internet of Things
1.0 3/11/2015 PDF 625.7 KB
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iCE40 Ultra Wearables Infographic
1.0 12/31/2015 PNG 459.9 KB

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