Search the Lattice Website

Document

iCE65 Low Power Design Guidelines

Application Note FPGA-AN-02046 1.1 PDF 1.4MB

Document

Lattice Propel 2025.1.1 Release Notes

• Supports semihosting for On-Chip-Debugging and QEMU Virtual Platform. • Supports multiple channels for On-Chip-Debugging. • Supports “Attach to running target” for On-Chip-Debugging. • Supports user custom application templates

Document

Lattice Propel 2.2 Release Notes

 Supports printf through semihosting during On-Chip-Debugging.  Supports backward compatible templates such as Sentry 1.0 and Sentry 2.1 projects.  Supports pin connection through auto connect in Propel Builder

Document

Lattice Propel 1.0 User Guide

Programming and On-Chip-Debugging Flow ..................................................................................................... 24 3.5.1. Creating a Debug Launch Configuration ....................................................................................................... 24…

Document

Lattice Propel 2024.2.1 Release Notes

• Supports semihosting for On-Chip-Debugging and QEMU Virtual Platform. • Supports multiple channels for On-Chip-Debugging. • Supports “Attach to running target” for On-Chip-Debugging. • Supports user custom application templates

Document

Lattice Propel 2025.1 Release Notes

• Supports semihosting for On-Chip-Debugging and QEMU Virtual Platform. • Supports multiple channels for On-Chip-Debugging. • Supports “Attach to running target” for On-Chip-Debugging. • Supports user custom application templates

Document

Lattice Propel 2024.1 Release Notes

• Supports semihosting for On-Chip-Debugging and QEMU Virtual Platform. • Supports multiple channels for On-Chip-Debugging. • Supports “Attach to running target” for On-Chip-Debugging. • Supports user custom application templates

Document

Lattice Propel 2024.2 Release Notes

• Supports semihosting for On-Chip-Debugging and QEMU Virtual Platform. • Supports multiple channels for On-Chip-Debugging. • Supports “Attach to running target” for On-Chip-Debugging. • Supports user custom application templates

Document

Lattice Propel 2025.2 v2 Release Notes

• Supports semihosting for On-Chip-Debugging and QEMU Virtual Platform. • Supports multiple channels for On-Chip-Debugging. • Supports “Attach to running target” for On-Chip-Debugging. • Supports user custom application templates

Document

Lattice Propel 2023.2 Release Notes

• Supports printf through semihosting during On-Chip-Debugging. • Supports multiple channels for On-Chip-Debugging. • Supports soft JTAG. • Supports IP driver version tracking. • Supports software data watchpoint

Document

Lattice Propel 2023.1 Release Notes

• Supports printf through semihosting during On-Chip-Debugging. • Supports multiple channels for On-Chip-Debugging. • Supports soft JTAG. • Supports IP driver version tracking. • Supports software data watchpoint.

Document

Lattice Propel 2022.1 Release Notes

 Supports printf through semihosting during On-Chip-Debugging.  Supports multiple channels for On-Chip- Debugging. Lattice Propel Builder  Supports adding some Lattice Radiant foundation IP

Document

Lattice Propel 2.0 Release Notes

 Integrates GDB and Open On-Chip-Debugging (OCD) with chained JTAG.  Supports peripherals view with register description during debug session.  Supports syntax highlighting for various development languages.

Document

Lattice Propel 2.1 Release Notes

• Integrates GDB and Open On-Chip-Debugging (OCD) with chained JTAG. • Supports peripherals view with register description during debug session. • Supports syntax highlighting for various development languages.

Document

Lattice Propel 1.0 Release Notes

 Integrates GDB and Open On-Chip-Debugging (OCD) with chained JTAG. Template Design and System Simulation  Provides template design, the HelloWorld project.  Supports functional verification using system-level simulation environment for templates.

Document

ORCA ORT82G5 Applications Brief

Applications FIELD PROGRAMMABLE SYSTEM-ON-A-CHIP

Webpage

Hi-Lo Systems

Hi-Lo offers comprehensive solutions for IC Programming including manual device programmer, auto programming system and programming service.

Webpage

PC DVI Receiver

Digital video receiver chips for display devices including PC monitors, TVs and projectors.

FAQ

MachXO2: What is best practice for the MachXO2 Slave SPI Chip Select (SN)?

The Slave SPI (SSPI) Chip Select (SN) input signal is recommended to be pulled high using an external pull-up resistor.The SSPI configuration port is the second highest in boot priority, with JTAG being the highest priority. Assertion of the SN input, deliberate or not, can cause the MachXO2 to fail…

Webpage

Avant MPPHY Module

The MPPHY Module supports the most common high-speed SERDES protocols used for inter-chip connectivity.