SubLVDS to MIPI CSI-2 Image Sensor Bridge Reference Design

Bridging industrial and A/V image sensors to mobile application processors

Most off-the-shelf Application Processors use industry standard interfaces such as MIPI CSI-2. However, several high-end image sensors traditionally focused on industrial and audio/video broadcast markets have proprietary interfaces such as SubLVDS. The mobile industry accelerated many advances in application processor technology while additionally driving down cost and power. Many new applications want to leverage mobile innovations while using these image sensors with SubLVDS interface.

Using SubLVDS to MIPI CSI-2 image sensor bridge reference design for CrossLink Family, you can quickly create a bridging solution and configure for the specific interface requirement. This reference design is free and is provided to demonstrate the use of Lattice’s popular CrossLink Family modular IPs including Pixel to Byte Converter, SubLVDS Image Sensor Recevier and CSI-2/DSI D-PHY Transmitter.

Features

  • 4, 6, 8, or 10 lane SubLVDS input to 1, 2, or 4 lane MIPI CSI-2 output
  • Up to 1.2 Gbps bandwidth per input lane
  • Up to 1.5 Gbps bandwidth per output lane
  • Dynamic parameter setting via I2C
  • Option for image cropping

Jump to

Block Diagram

CrossLink Modular IP Support Table

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
SubLVDS to MIPI CSI-2 Image Sensor Bridge Reference Design - Documentation
FPGA-RD-02061 1.1 9/30/2019 PDF 2.9 MB
SubLVDS to MIPI CSI-2 Image Sensor Bridge Reference Design - Source Code
1.0 7/10/2019 ZIP 13.8 MB


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