Byte to Pixel Converter

Convert Parallel Data From a D-PHY Receiver into Pixel Format

Due to the higher demand for better displays, bridging applications has become increasingly popular. One very common application interface is the Mobile Industry Processor Interface (MIPI®) D-PHY. It was developed primarily to support camera and display interconnections in mobile devices, and it has become the industry’s primary high-speed PHY solution for these applications in smartphones today. It is typically used in conjunction with MIPI Camera Serial Interface-2 (CSI-2) and MIPI Display Interface (DSI) protocol specifications. MIPI D-PHY meets the demanding requirements of low-power, low noise generation, and high noise immunity that mobile phone designs demand.

The Byte-to-Pixel Converter IP converts CSI-2/DSI standard based video payload packets from D-PHY Receiver Module output to pixel format. In addition, Byte-to-Pixel Converter IP generates camera/video control signals in the pixel domain, based on CSI-2 or DSI synchronization packets. Byte-to-Pixel IP accepts CSI- 2/DSI standard based video payload packets and generates Pixel Format output.

Features

  • MIPI DSI and CSI-2 compatible video formats
  • 1-, 2-, or 4-lane inputs
  • 8-bit (gear 8) or 16-bit (gear 16) inputs per lane
  • 1, 2, or 4 output pixels per pixel clock cycle
  • Non-burst mode with sync pulses

Block Diagram

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Byte-to-Pixel Converter IP
FPGA-IPUG-02027 1.1 5/10/2019 PDF 2.3 MB


Ordering Information

The Byte to Pixel core is available for FREE for use in Diamond design software.

For Radiant design software, the Byte to Pixel core must be purchased:

Family Part Numbers Description
CrossLink-NX BYTE-PIXEL-CNX-U Single-Design License
CrossLink-NX BYTE-PIXEL-CNX-UT Multi-Site License

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