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[Blog] Advancing Hyperloop System Integration with Lattice FPGAs

Advancing Hyperloop System Integration with Lattice FPGAs
Posted 10/20/2026 by Lattice Semiconductor

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Each season, Swissloop, a student-led engineering team from ETH Zürich, develops a new pod for European Hyperloop Week (EHW). The 2026 team built on earlier control-system advances with a more integrated vehicle architecture designed to bring propulsion, levitation, sensing, communication, and speed control together in one coordinated system.

The Swissloop 2026 pod

The Swissloop 2026 pod

The 2026 pod marked several technical milestones for Swissloop. It introduced the team’s first cylindrical-cell lithium-ion battery design, reached a top speed of 80 km/h, and became the first Swissloop pod capable of maintaining an arbitrary fixed speed. The braking system delivered up to 2g of deceleration and supported bidirectional operation. The team also achieved stable levitation while driving the passenger-compatible pod for the first time in three years.

Swissloop’s 2026 pod and track system

Swissloop’s 2026 pod and track system

Expanding FPGA Control Across the System
Lattice MachXO3™ control-focused FPGAs formed the foundation of the pod’s propulsion and levitation systems and also supported the Vehicle Control Unit. The devices controlled current across six power converters, managed communication between the converters and the Vehicle Control Unit, and connected with the Levitation Control Unit. For levitation, the FPGA-based architecture enabled low latency communication, processed laser sensors and light gates, and calculated the current values required to keep the pod operating reliably.

The expanded FPGA implementation also handled speed calculation, fixed-speed control, booster current control, and high-rate data logging. Sensor readings, including current, temperature, and voltage measurements, were captured at up to 600 kHz into 512 Mbit of PSRAM and transferred through an FTDI interface for analysis.

Lattice MachXO3 FPGA used in the 2026 Swissloop control architecture

Lattice MachXO3 FPGA used in the 2026 Swissloop control architecture

FPGA-based control hardware in the Swissloop 2026 pod

FPGA-based control hardware in the Swissloop 2026 pod

More than 30 teams from around the world participated in EHW 2026. Swissloop placed first overall and won all five engineering awards, including Best Propulsion and Best Levitation. The results reflected both the team’s engineering execution and the broader role of the FPGA architecture across propulsion, levitation, sensing, communication, speed control, and data logging.

The Swissloop 2026 team

The Swissloop 2026 team

Supporting the Next Generation of Engineers
Lattice Semiconductor is proud to support Swissloop as the team continues to advance Hyperloop research and develop hands-on engineering expertise. By combining low power, programmable flexibility, and deterministic real-time control, Lattice FPGAs help student innovators translate ambitious transportation concepts into working systems.

For more information, visit the MachXO3 FPGA product page, and to learn more about how Lattice low power FPGA technology can help with your next breakthrough application development, reach out to speak with the team at Lattice.

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