LatticeXP2: How to access LatticeXP2 User Electronic Signature (UES)?
LatticeXP2 UES is accessible over with JTAG port.
Alternately, similar operation can be done with LatticeXP2 TAG memory access as described in the LatticeXP2 Memory Usage Guide: FPGA-UG-02080 on section 4.9 - User TAG Memory.
The TAG memory is an area of the on-chip Flash that can be used for non-volatile storage including electronic ID codes, version codes, date stamps, asset IDs and calibration settings.
TAG memory can be accessed by the internal SPI (Serial Peripheral Interface) interface through the core. The internal SPI interface of TAG Memory capable of supporting advanced applications.
For example:
1. Use an I2C to SPI translator to convert the SPI TAG memory to be an I2C TAG memory device.
2. Route the four SPI interfaces to the other four user I/Os.