Article Details

ID: 3601
Case Type: faq
Category: Lattice IP/Reference Design
Related To: PCIe
Family: LatticeECP3

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LatticeECP3: Why do I need to indicate the Header credits while performing memory reads for the Lattice PCIe IP?

PCIe protocol classifies all transactions in two types:

- Posted


- Non-posted



In posted transactions, the Requester sends the TLP packet to the Completer, and the Completer will not send any completion TLP packet back to the Requester.

So, Memory Write and Message transactions are posted transactions.


In non-posted transactions, the Requester sends the TLP packet to the Completer, and the Completer will send the completion TLP packets back to the Requester either with data or without data depending on the request sent to the Completer. 
So, Memory Read, Memory Read Lock, I/O Read, I/O Write, Configuration Read (type 0 and type 1) and Configuration Write (type 0 and type 1) are non-posted transactions.

IPexpress GUI:


The Infinite PH and Infinite PD credit options can be enabled only for posted headers and posted data transactions which are related to Memory Write and Message transactions.

There is no option to set the infinite credits for non-posted header and non-posted data transactions. So, you need to check the credit values for non-posted transactions.