FAQ

Simulation: Steps to compile/elaborate a SERDES based design in NC-Verilog?

Simulation: Compiling/elaborating a SERDES based design requires pre-compiling the
SERDES model.  Follow the steps below to compile the Lattice
SERDES model, revise your library definition file, and compile and
elaborate your design.

• Unzip the provided SERDES model.  The model is in the installation directory under:<install_dir>/diamond/1.3/cae_library/simulation/blackbox

• Use the pcsd_cmpl_ncv.scr script from the unzipped directory to compile the model into a library.  This is the SERDES pre-compiled library.
  

• Update your library definition file (cds.lib) to include the pre-compiled SERDES library.  Below is a sample cds.lib file
  

#  SERDES pre-compiled library

DEFINE pcsd_work <install_dir>/diamond/1.3/cae_library/simulation/blackbox/pcsd-ncv/pcsd_ncv_work

# ECP3 digital elements library

DEFINE ecp3 <install_dir>/diamond/1.3/cae_library/simulation/ecp3/work

# User design library

DEFINE work ./work

• Compile and elaborate your SERDES based design.  Below is a sample compilation script (module name is file name without .v extension)