Does the LatticeSC PLL require a reset if the PLL lost lock?
The PLL may or may not need a reset, depending on why it lost lock.
If any of the dividers (parameter setting) are changed, the PLL must be reset.
If due to reference clock stability issue, and the lock detect comes up again after clock becomes stable, the loop is fine. In such case, reset is not required. But in general a reset after it lost lock is helpful and allow the PLL to restart and run properly.