As mentioned in DS1005, (flexiPCS Testing section):
- SERDES parallel far-end loopback will not work unless the incoming HDIN data was created by a clock that is fully synchronous to
the local SERDES/PCS reference clock (0 ppm). This means the Smartbits and flexiPCS PCS reference clocks must be frequency locked.
- PCS parallel far-end loopback when in a PCS mode that does not use the CTC block will not work unless the incoming HDIN data was created by a clock that is fully synchronous to the local SERDES/PCS reference clock (0 ppm).
Generic 10-bit mode, does not include a CTC block in the flexiPCS RX path. If the PCS/SERDES reference clock and the reference clock that clocks the Smartbits module are not synchronous, then this explains why these two loopbacks are not working for you.
Since you are connecting you block to a Smartbits GBE generator (1000BASE-X), we suggest that you re-generate the PCS in Gigabit Ethernet mode and redo your testing. GbE mode will include all the necessary elements to achieve a successful loopback (GbE Link state machine, 8b10b encoder/encoder, word aligner, CTC block and GbE receive/transmit machines). Please refer to the Gigabit Ethernet mode section of DS1005.