The LT-125 is a LatticeECP3 FPGA based board for the evaluation of Enciris Technologies’ HD and SD video compression and decompression IP. The LT-125 is designed to demonstrate high performance h.264/AVC and VC-1 encoding and decoding in FPGA applications.
This board is equipped with an HDMI input, a DVI input with both single and dual link capabilities, and an SMPTE 3G/HD/SD-SDI input. These inputs can be used for one or multiple channel video capture and acquisition. An HDMI output is also provided for display in pass-through or decoding applications. As the LT-125 uses FPGA technology for video processing, it is inherently very flexible and can be configured for a multitude of operations. Enciris Technologies supplies tools to change the LT-125 operating modes by using a choice of different FPGA configurations. The supplied LT-125 configurations are full featured and have additional functionality that is not included in our standard h.264 and VC-1 IP deliverables.
Multiple configuration are available including single channel H.264 compression, dual channel H.264 compression, dual channel VC-1 compression, etc. Some modes of operation are still under development and more will be added. Easy to use demo applications are included demonstrating the mode of operation. Using the resources of a LatticeECP3-150 and four 32-bit Mobile DDRs the LT-125 can be configured to compress up to either two channels of 1080p HDTV at 30 frames per second video simultaneously or one channel of 1080p at 60 frames per second. Up to four channels of HDTV can be decompressed with the LT-125.