RSA Signature Verification, Compact (XIP5012C)

XIP5012C – Compact RSA Signature Verification IP Core

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The compact RSA Signature Verification from Xiphera is a very compact Intellectual Property (IP) core designed for RSA (Rivest- Shamir-Adleman) signature verification. This IP core supports all modulus lengths up to 4096 bits, and it can also be used for RSA public key exponentiation. RSA signature verification is used in numerous contemporary security protocols and applications, including TLS 1.3.

Standard Compliance: Xiphera's compact RSA Signature Verification IP core is compliant with FIPS 186-4.

Minimal Resource Requirements: The entire IP core requires 419 4LUTs (lookup tables) and 1-2 memory blocks (Lattice® ECP5®) in a typical Lattice® FPGA.

Performance: Despite its small size, the IP core can support more than 10 digital signature verification operations per second.

Block Diagram

Internal high-level block diagram of XIP5012CExpand Image

Internal high-level block diagram of the compact RSA Signature Verification IP core

Ordering Information

Please contact sales@xiphera.com for pricing and your preferred delivery method. The IP core can be shipped in a number of formats, including netlist, source code, or encrypted source code. Additionally, a comprehensive VHDL testbench and a detailed datasheet are included.

Download the full product brief: https://xiphera.com/wp-content/uploads/XIP5012C_PB_lattice.pdf

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