Video Frame Buffer IP Core

Supports Dynamic Parameter Updating through a Parameter Bus

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Related Applications

The Video Frame Buffer IP Core buffers video data in external memory to be displayed on output devices such as computer monitors, projectors, and others. The Video Frame Buffer IP Core supports image sizes up to 4K x 4K with YCbCr 4:2:2, 4:4:4 and RGB video formats. It supports dynamic parameter updating through a parameter bus, which can be configured to operate on a different clock from the core. Simple frame rate conversion is employed to support different input and output frame rates.

Features

  • Supports single color, YCbCr 4:2:2, YcbCr 4:4:4 and RGB video formats
  • Supports input and output resolutions of 64 × 64 to 4k × 4k pixels
  • Supports serial and parallel pixel processing
  • Supports frame rate conversion
  • Supports dynamic parameter update of frame size and Keep mode

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Block Diagram

Performance and Size

IP Configuration for Nexus Family

For LIFCL-40-9BG400I using Synplify Pro of Lattice Radiant software 2.1 or later.
Configuration Fmax (MHz)*
i_clk_i
Fmax (MHz)*
mem_clk_i
Fmax (MHz)*
o_clk_i
Registers LUTs EBRs
Default 200 178.795 171.321 1031 903 2
Parallel processing is Unchecked,
Others = Default
200 161.238 182.484 959 854 2
Video format is YCbCr4:4:4 or RGB,
Video frame width = 1024,
Video frame height = 768,
Others = Default
200 178.795 182.482 1154 1083 2
Video frame width = 1920,
Video frame height = 1080,
Others = Default
200 180.701 182.482 1077 944 2
For LFD2NX-40-9BG256I using Synplify Pro of Lattice Radiant software 2.1 or later.
Configuration Fmax (MHz)*
i_clk_i
Fmax (MHz)*
mem_clk_i
Fmax (MHz)*
o_clk_i
Registers LUTs EBRs
Default 200 178.795 171.321 1031 903 2
Parallel processing is Unchecked,
Others = Default
200 161.238 182.482 959 854 2
Video format is YCbCr4:4:4 or RGB,
Video frame width = 1024,
Video frame height = 768,
Others = Default
200 178.795 182.482 1154 1083 2
Video frame width = 1920,
Video frame height = 1080,
Others = Default
200 180.701 182.482 1077 944 2
For LFD2NX-40-9BG256I using Synplify Pro of Lattice Radiant software 2.1 or later.
Configuration Fmax (MHz)*
i_clk_i
Fmax (MHz)*
mem_clk_i
Fmax (MHz)*
o_clk_i
Registers LUTs EBRs
Default 200 178.795 171.321 1031 903 2
Parallel processing is Unchecked,
Others = Default
200 161.238 182.482 959 854 2
Video format is YCbCr4:4:4 or RGB,
Video frame width = 1024,
Video frame height = 768,
Others = Default
200 178.795 182.482 1154 1083 2
Video frame width = 1920,
Video frame height = 1080,
Others = Default
200 180.701 182.482 1077 944 2

*Note: Fmax is generated when the FPGA design only contains Video Frame Buffer IP Core and the target Frequency is 100 MHz. These values may be reduced when user logic is added to the FPGA design.

Ordering Information

  Part Numbers
Device Family Multi-site Perpetual Single Seat Annual
Avant-E VFB-AVE-UT VFB-AVE-US
CertusPro-NX VFB-CPNX-UT VFB-CPNX-US
Certus-NX VFB-CTNX-UT VFB-CTNX-US
CrossLink-NX VFB-CNX-UT VFB-CNX-US
ECP5 VFB-E5-UT -
LatticeECP3 VFB-E3-UT -
LatticeECP2 VFB-P2-UT -
LatticeECP2M VFB-PM-UT -
LatticeXP2 VFB-X2-UT -

To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

To find out how to purchase the Video Frame Buffer IP core, please contact your local Lattice Sales Office.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Video Frame Buffer IP Core User's Guide
IPUG107 2.0 3/24/2015 PDF 2.3 MB
Video Frame Buffer IP Core - Lattice Radiant Software
FPGA-IPUG-02137 1.2 2/15/2024 PDF 788.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
IPexpress Quick Start Guide
8/5/2010 PDF 304.8 KB

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