The CertusPro™-NX Mobile Industry Processor Interface (MIPI®) Display Serial Interface (DSI) to DisplayPort (DP) bridge design features a MIPI D-PHY receiver front-end configuration with four lanes. The bridge decodes MIPI DSI 24 bpp RGB888 packets and converts the formatted video data stream to a DisplayPort with up to four lanes at 5.4 Gb/s.
The Raspberry Pi 5 board serves as the video source, sending the 1080p60 sync pulse mode video signal to MIPI DSI D-PHY receiver (RX). This data is processed through a Byte-to-Pixel Converter, which translates the incoming byte stream into pixel data in the pixel domain based on the DSI synchronization packets. The pixel data is fed into a Video Scaler, which adjusts the resolution and size of image to meet the output requirements. The scaled image is transmitted through the DP transmitter (TX) to a monitor, where the final output is displayed. This demo is targeted to upscale RGB888 video resolution from 1080p60 to 4K60.