DC-SCM LVDS Tunneling Protocol and Interface (LTPI) IP Core

Compliant with OCP DC-SCM 2.0 and Aggregate Multiple Data Channel

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The Lattice Semiconductor DC-SCM LVDS Tunneling Protocol and Interface (LTPI) IP Core is an Open Compute Project® (OCP) Data Center – Secure Control Module (DC-SCM) Standards compatible solution which is introduced in the DC-SCM 2.0 Specification. This DC-SCM LTPI IP is OCP Ready™.

Resource Utilization details are available in the IP Core User Guide.

Features

  • Compliant with the DC-SCM 2.1 LTPI revision 1.1, version 1.1 specification
  • Link initialization, discovery, and negotiation
  • Supports Multi-Channel Serial Interface
  • Supports LVDS and subLVDS
  • Supports up to five channels aggregation/disaggregation in total

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Block Diagram

DC-SCM LVDS Tunneling Protocol and Interface IP Core Block DiagramExpand Image

Ordering Information

Device Family Part Number
Single Seat Perpetual Single Seat Annual
CertusPro-NX LTPI-CPNX-UT LTPI-CPNX-US
CrossLink-NX LTPI-CNX-UT LTPI-CNX-US
Certus-NX LTPI-CTNX-UT LTPI-CTNX-US
MachXO5-NX LTPI-XO5-UT -
MachXO3D LTPI-XO3D-UT -
MachXO3 LTPI-XO3-UT -
Mach-NX LTPI-MNX-UT -

Evaluate: To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

Purchase: To find out how to purchase the IP core, please contact your local Lattice Sales Office.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
DC-SCM LTPI IP Core – User Guide
FPGA-IPUG-02200 2.0 10/13/2025 PDF 2.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
DC-SCM LTPI IP Core - Release Notes
FPGA-RN-02021 1.1 10/14/2025 PDF 309.9 KB

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