Citrobits' Hyperram memory controller was strategically designed with user accessibility as a top priority, leveraging the AXI 4 interface, widely adopted in modern system architectures. This design choice ensures effortless integration into existing systems, aligning with industry standards, and simplifying development processes. Additionally, the controller offers self-calibration delay to facilitate users to operate with the IP. Moreover, other parameters can be set through generics, empowering them to tailor the controller's operation to their specific requirements. The controller is capable of operating at speeds of up to 200MHz, providing a realistic and reliable solution for a diverse range of memory-intensive tasks.