The typical rise time for the LatticeSC SERDES external reference clock is 500 ps. Maximum is 1000 ps.
Rise time has impact on system quality, for example, if the rise time is too fast, such as 200 ps rise time, it can cause reflection problem for high speed application. Careful termination and impedance matching should be analyzed to ensure the optimal clock quality at the exact internal point of reference clock input IO pad.