Description:
Mixed input standards can be supported by using the ratioed input buffer or using the I/O types LVCMOS**R** with the referenced input buffer. when using the ratioed input buffer in under-drive or over-drive conditions, the HYSTERESIS setting should be NA, the CLAMP setting should be OFF, and the PLLMODE setting should be DOWN. Since only one VREF signal can be supported in each I/O bank, only one of these I/O standards can be used in each I/O bank. VCCIO for same bank LVCMOS/LVTTL input/output requirments are listed below:
LVCMOS12: outputs require VCCIO=1.2V, inputs available in all VCCIO levels.
LVCMOS15: outputs require VCCIO=1.5V, inputs available in all VCCIO levels.
LVCMOS15R33: input only, require VCCIO=3.3V and VREF=0.75V.
LVCMOS15R25: input only, require VCCIO=2.5V and VREF=0.75V.
LVCMOS18: outputs require VCCIO=1.8V, inputs available in VCCIO levels except VCCIO=1.2V.
LVCMOS18R33: input only, require VCCIO=3.3V and VREF=0.9V.
LVCMOS18R25: input only, require VCCIO=2.5V and VREF=0.9V.
LVCMOS25: outputs require VCCIO=2.5V, inputs available in VCCIO levels except VCCIO=1.2V.
LVCMOS25R33: input only, require VCCIO=3.3V and VREF=1.25V.
LVCMOS33: outputs require VCCIO=3.3V, inputs available in VCCIO levels except VCCIO=1.2V.
LVTTL33: outputs require VCCIO=3.3V, inputs available in VCCIO levels except VCCIO=1.2V.
For more details about mixed voltage support please refer to MachXO2 sysIO Usage Guide