If you need a simple and quick way to develop system management interfaces for optical Ethernet systems up to 100Gb/s, this new FPGA reference design – based on Lattice’s MachX03 and ECP5 small, low power, inexpensive FPGAs - is what you’ve been looking for.
Master/Slave Controllers – Lattice reference design RD1194 is proven to support MDIO IEEE 802.3 Clause 45/22 master/slave controllers, delivering a simple Wishbone user logic interface that enables the user to access the PHY registers. The design features pre-amble pattern selection through the input port, and can be used to off-load the multiport CFP2/4 management from the main data path devices.
Tiny, low power, cost-efficient solutions – Lattice FPGAs enable designers working in consumer, communications and industrial markets to quickly and simply remove development obstacles and deliver new features. Applications include multiport CFP2/4 MDIO MUX, chip-to-chip communications and Voltage Level Translation.