Machine Learning / On-device AI

Neural network algorithms for always-on, low power face detection using low resolution image sensor

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This iCE40 UltraPlus reference design uses artificial intelligence (AI) to implement a human detection algorithm. AI is when technology is used for traditional tasks typically performed by humans because machines can more efficiently and quickly process and compute enormous amounts of data. FPGAs, by design, have the ability to process data in parallel making them more efficient at such tasks compared to a microprocessor.

A neural network model is used in this application. Training is done on a powerful GPU by passing 100,000 human faces through the untrained model to calculate weights and activation and create a trained model. Weights and activation are then transported onto the iCE40 UltraPlus device where an object can be passed through the trained model and the model will infer if it’s a human face or not.

Bringing AI to the network edge is challenging but it also offers tremendous opportunity. Building AI into iCE40 UltraPlus FPGA instead of cloud-based resources can dramatically cut power consumption while accelerating response time. By building AI into the device, designers gain always-on intelligence even when the network is turned off to save power. Security is also improved by keeping the processing local. 


  • Accelerated, low power face detection at network edge using neural network model
  • Uses binary weights and 8-bit fixed point activation, reducing overall power consumption while maintaining high accuracy
  • With integrated 128K bytes of memory, weights/activations can be stored directly inside of iCE40 UltraPlus FPGA
  • Can be optimized between power and response time depending on system needs
  • The same technique can be used to detect other items such as dogs, cats, cars, ships or specific sounds

Block Diagram

iCE40 UltraPlus Face Detect block diagram


Technical Resources
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iCE40 UltraPlus Face Detect Design Files
1.0 6/27/2017 ZIP 1.1 MB
iCE40 UltraPlus Face Detect Reference Design User Guide
FPGA-UG-02027 1.1 11/29/2017 PDF 636.1 KB

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