LPDDR3 SDRAM Controller

A Lattice FPGA based LPDDR3 solution – The Lattice Low Power Double Data Rate (LPDDR3) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller that interfaces with industry standard LPDDR3 memory devices and modules compliant with the JESD-209.3 specification.

Easily integrate LPDDR3 into your design – This IP core reduces the efforts required to integrate the LPDDR3 memory controller with the remainder of the customer design.


  • Interfaces to Industry Standard LPDDR3 SDRAM components and modules compliant with the JESD-209.3 specification
  • High-Performance LPDDR3 performance, up to 400 MHz/800 Mbps operation
  • Supports automatic LPDDR3 SDRAM initialization and refresh
  • Supports Deep Power Down Mode

The LPDDR3 SDRAM Controller is available as a Clarity Designer user configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased.

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Block Diagram

LPDDR3 SDRAM Controller IP Core Block Diagram

Performance and Size

Parameters Slices LUTs Registers I/O2 fMAX (MHz)3
Data Bus Width: 16 (x16) 1599 2241 1639 34 400 MHz (800 Mbps)
Data Bus Width: 32 (x32) 1818 2462 1939 54 400 MHz (800 Mbps)

1. Performance and utilization data are generated targeting an LFE5UM-85F-8BG756CES device using Lattice Diamond 3.3 design software with an LFE5UM control pack. Performance may vary when using a different software version or targeting a different device density or speed grade within the ECP5 family.
2. Numbers shown in the I/O column represent the number of primary I/Os at the LPDDR3 memory interface. User interface (local side) I/Os are not included.
3. The LPDDR3 IP core can operate at 400 MHz (800 LPDDR3) in the fastest speed-grade (-8) when the data width is 32 bits or less and one chip select is used.

Ordering Information

  Part Number
Device Family Multi-site Perpetual Single Seat Annual

IP Version: 1.0

Evaluate: To download a full evaluation version of this IP, go to the Clarity Designer tool and click the Lattice IP Server tab in the window. All LatticeCORE IP cores and modules available for download will be visible.

Purchase: To find out how to purchase the IP Core, please contact your local Lattice Sales Office.


Quick Reference
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LPDDR3 SDRAM Controller IP Core User's Guide
IPUG110 1.0 9/23/2014 PDF 3 MB

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