The 2.5GMAC IP core supports the ability to transmit and receive data between a host processor and an Ethernet network. The main function of the Ethernet MAC is to ensure that the Media Access rules specified in the 802.3 IEEE standard are met while transmitting a frame of data over Ethernet. On the receiving side, the Ethernet MAC extracts the different components of a frame and transfers them to higher applications through the FIFO interface.
Supports Full Duplex Operation - The 2.5GMAC IP core is a fully synchronous machine composed of Transmit and Receive MAC sections that operate independently to support full duplex operation
Directly Compatible with the 2.5GMAC GMII Interface - To overcome the difficulty to find external PHY devices that directly connect, Lattice provides a 2.5G PCS IP core with a 16-bit data path and 156.25 Mhz clock that is directly compatible with the 2.5GMAC GMII interface.