Lattice Developers Conference 2024

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Keynotes

LDC24 Opening Keynote
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2024 Lattice Developers Conference: Opening Keynotes

Lattice Developers Conference 2024, held from December 10-11, was a hybrid event for which over 6,000 global industry leaders, technology experts, and enthusiasts signed up to explore the latest advancements in low power FPGA solutions. Watch the Lattice Developers Conference opening keynotes by Lattice executives announcing the launch of Lattice Nexus™ 2, a next-generation small FPGA platform, and the Lattice Certus™-N2 FPGA family, the first device family based on the platform. Additionally, Lattice extended its mid-range FPGA portfolio with the launch of new Lattice Avant™ 30 and Avant™ 50 devices, alongside new versions of its design software tools and application-specific solution stacks to help accelerate customers’ time to market.
LDC24 Guest Keynote – Microsoft “Elevating Trust and Security in Modern Datacenters”
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Microsoft: Elevating Trust and Security in Modern Datacenters

Watch Microsoft’s guest keynote session at the Lattice Developers Conference highlighting the role of FPGAs in enhancing security and connectivity in cloud computing. In this session, Microsoft showcased innovative ways FPGAs are being used to improve data security and network performance, particularly in large-scale cloud environments, with a spotlight on standardized root of trust technology like Caliptra.
LDC24 Guest Keynote – SICK AG “A Golden Age for Sensing - the Thirst for Information”
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SICK AG: A Golden Age for Sensing - the Thirst for Information

Watch SICK’s guest keynote session at the Lattice Developers Conference delving into the applications of FPGAs in industrial automation and robotics. In this talk, SICK demonstrated sensor intelligence showing how FPGAs take on real-time sensor tasks on the latest Lattice and NVIDIA Holoscan edge AI platform to enhance the precision and efficiency of automated systems, contributing to smarter and more responsive industrial operations.
LDC24 Guest Keynote – Teledyne FLIR “Saving Lives with Longwave Infrared Thermal Safety Cameras”
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Teledyne FLIR: Saving Lives with Longwave Infrared Thermal Safety Cameras

Watch Teledyne FLIR’s guest keynote session at the Lattice Developers Conference focusing on the use of FPGAs in advanced sensing and imaging technologies. In this keynote, Teledyne FLIR illustrated how FPGAs are enabling new capabilities in thermal imaging and sensor fusion, which are critical for defense, security, and industrial inspection applications.
LDC24 Guest Keynote – Dell “Future of AI based Context Sensing in Edge Devices”
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Dell: Future of AI Based Context Sensing in Edge Devices

Watch Dell’s guest keynote session at the Lattice Developers Conference focusing on the integration of low power FPGAs in edge computing solutions. In this talk, Dell discussed how these technologies are driving advancements in data processing and AI at the edge, enabling more efficient and powerful computing capabilities.
LDC24 Keynote - "Harnessing the FPGA Advantage in the Intelligent Edge"
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Lattice: Harnessing the FPGA Advantage in the Intelligent Edge

In this talk, we'll explore the transformative power of FPGAs in edge computing. We'll discuss how FPGAs enable real-time data processing, enhance IoT devices, and revolutionize industries like autonomous vehicles and smart manufacturing. Dive into innovative use cases that leverage the low power, low latency, and flexibility of FPGAs, unlocking new possibilities for an intelligent edge.

Breakout Presentation

Analyzing and Optimizing Power in FPGA Designs
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Analyzing and Optimizing Power in FPGA Designs

This presentation covers the fundamentals of FPGA power consumption and provides an overview of the Lattice Power Calculator tool, including its various modes and a hands-on tutorial on its usage.
Building High Security Systems with Lattice FPGAs
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Building High Security Systems with Lattice FPGAs

Learn about security features and blocks on Lattice devices in this session and get a deeper understanding on how these features can be implemented on Lattice MachXO3D™ and MachXO5D™ devices.
Deploying Edge AI Applications with Lattice sensAI Solution Stack
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Deploying Edge AI Applications with Lattice sensAI™ Solution Stack

This session provides an overview of the Lattice sensAI™ solution stack for deployment of AI models onto Lattice FPGAs, it gives the latest update to the solution including learned step quantization, mixed precision (4/8-bit) , use of system generator to build SoC on FPGA fabric and improvement to sensAI studio training framework and simulator.
Designing AI Solution with Lattice for Real-World Applications
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Designing AI Solution with Lattice for Real-World Applications

Discover the journey of designing AI systems with Lattice devices through the learnings from various real-world customer applications. This session offers a special focus on a Sichuan pepper sorting system, which utilizes AI with Lattice devices to provide a low latency and reliable real-time application.
Designing with Lattice Automate™ Solution Stack
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Designing with Lattice Automate™ Solution Stack

This presentation provides an overview of the Lattice Automate™ solution stack and low power Lattice FPGA solutions for factory automation, including motor control, predictive maintenance, Industrial Ethernet, and cloud connectivity via OPC-UA.
Developing DDR/LPDDR Solutions with FPGAs
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Developing DDR/LPDDR Solutions with FPGAs

Explore the diverse external memory solutions offered by Lattice Semiconductor and gain insights into the supported protocols and features across different device families. This session also provides a comprehensive guide to the design process using Lattice Semiconductor’s external memory solutions.
Developing Ethernet Solutions with FPGAs
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Developing Ethernet Solutions with FPGAs

This presentation provides an overview of the Ethernet technology, and demonstrates the building blocks from Lattice that can be used to develop an Ethernet solution for your application.
Developing Low Power Systems with Avant Mid-range FPGAs
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Developing Low Power Systems with Lattice Avant™ Mid-range FPGAs

This session will focus on designing with the Lattice Avant™ device family - providing tips and tricks to build high-performance, low-power designs utilizing DSP, memories, and SERDES.
Developing MIPI Solutions with FPGAs
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Developing MIPI Solutions with FPGAs

Enhance your knowledge of Lattice Video Processing solution with MIPI CSI-2 technology and get an insight of the full development process of MIPI to Parallel and Parallel to MIPI design using Lattice Avant™-E devices.
Embedded Software Development Using Lattice Golden System Reference Design
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Embedded Software Development Using Lattice Golden System Reference Design

Get an overview of Lattice Golden System Reference Design (GSRD), a full working FPGA system design using RISC-V and a walkthrough of TCP/IP based application development and integration using the GSRD.
FPGA Timing Constraints & Timing Closure Deep Dive
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FPGA Timing Constraints & Timing Closure Deep Dive

Resolving timing issues and achieving timing closure are critical as you build complex FPGA designs. This session walks through the various techniques you can use throughout the FPGA development process to achieve timing closure.
Implementing Low Power FPGA-based USB Designs
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Implementing Low Power FPGA-based USB Designs

USB interfaces are prevalent in many system designs. This presentation covers USB applications in low power FPGA designs including USB bridging demonstrations.
Introduction to FPGAs
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Introduction to FPGAs

New to FPGA design or new to Lattice? Be introduced to how FPGA devices work, learn practical steps to get you started on your first FPGA design, and get to know various FPGA design techniques.
Lattice Drive™ - Paving the Road for the Future
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Lattice Drive™ - Paving the Road for the Future

Automotive systems have an increasing number of cameras and displays for a variety of ADAS and infotainment applications. This session will provide an overview of the latest solutions from Lattice that enable flexible image processing and improve display performance.
Quantum Threat – A New Era of Security
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Quantum Threat – A New Era of Security

This session will provide an overview of the Quantum threat, the fundamentals of PQC (Post Quantum Cryptography) to combat this threat, and an introduction to the FPGA based crypto agile solution.
Reducing System Cost with Lattice Low Power FPGAs
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Reducing System Cost with Lattice Low Power FPGAs

This session will discuss how small form factor, simplified power tree, and fast boot time lower the cost of ownership for Lattice FPGAs.
Tools and Techniques for Higher Design Efficiency
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Tools and Techniques for Higher Design Efficiency

Learn the benefits and techniques in using Lattice Radiant™ block-based design flow, virtual-I/O flow, and incremental design to ease and speed up your design process.
Vision Solution with Gigabit Multi-Media Serial Link (GMSL)
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Vision Solution with Gigabit Multi-Media Serial Link (GMSL™)

Lattice will present an overview of how low power, small form factor FPGAs bridge the GMSL link into Edge compute devices. A new way to connect GMSL in industrial and automotive applications.
Troubleshooting FPGA Designs with Reveal
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Troubleshooting FPGA Designs with Reveal

Discover the features of Lattice Reveal Analyzer, a powerful integrated debugging tool that make debugging effective from pre-synthesis to post-synthesis design development process. Learn how this tool can help to identify functionality issues in your design easily.
Implementing Caliptra and LTPI based Zero Trust Server Architecture
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Implementing Caliptra and LTPI based Zero Trust Server Architecture

The session provides the blueprint for implementing various attestation solutions using components like LTPI and Caliptra (OCP defined RoT) and managed by Lattice Platform Root of Trust FPGA to achieve a resilient Zero Trust server architecture.

Technology Demonstrations

Lattice Nexus™ 2 FPGA Platform: Power and Performance Leadership Demonstration
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Lattice Nexus™ 2 FPGA Platform: Power and Performance Leadership Demonstration

Watch how the Lattice Nexus™ 2 FPGA platform delivers up to 3X lower power than similar class competitive devices, helping system and application engineers achieve power efficiency while simplifying thermal management and lowering operating costs.
Lattice Nexus™ 2 FPGA Platform: Boot Up Demonstration
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Lattice Nexus™ 2 FPGA Platform: Boot Up Demonstration

Watch the incredible boot up speed of the Lattice Nexus™ 2 FPGA platform in this demonstration. With significantly faster boot up time compared to similar class competitive devices, the Lattice Nexus 2™ FPGA platform is designed to enable security and safety critical applications.
Lattice Nexus™ 2 FPGA Platform: Edge Sensor Monitoring Demonstration
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Lattice Nexus™ 2 FPGA Platform: Edge Sensor Monitoring Demonstration

Watch how the Lattice Nexus™ 2 FPGA platform combines low power features and faster boot up capabilities to enable power constrained edge computing applications.
AIZip Ultra-Efficient Speaker Identification Model on Lattice CrossLink™-NX-33
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AIZip Ultra-Efficient Speaker Identification Model on Lattice CrossLink™-NX-33

This demo showcases a robust speaker identification model developed and deployed by Aizip Inc. The efficient neural network-based model can register multiple speakers and provide accurate, low-latency identification results. Co-designed to leverage the superior capabilities of the Lattice CrossLink™-NX-33 board, it features an optimized hardware accelerator to support model computations.
AMI Firmware Security with the Lattice MachXO5D™ and AMI Tektagon Platform RoT
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AMI Firmware Security with the Lattice MachXO5D™ and AMI Tektagon Platform RoT

AMI is showcasing a preview of the post-quantum capable Lattice MachXO5D™ Hardware Root of Trust controller, supporting the AMI Tektagon Platform Root of Trust solution. Delivering the most advanced firmware security to date, AMI Tektagon with the Lattice MachXO5D includes Intel PFR 4.0 compliance and supports CNSA 2.0 encryption, addressing the needs for post-quantum platform protection. This demonstration of a fully integrated silicon-firmware platform will feature PFR-compliant system firmware attestation and recovery from corruption.
Arrow & Citrobits Cross-Platform Vision AI Workloads Enabled by Lattice CrossLinkU™-NX
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Arrow & Citrobits Cross-Platform Vision AI Workloads Enabled by Lattice CrossLinkU™-NX

The Lattice CrossLinkU™-NX FPGA implements the USB Video Device Class (UVC) standard, allowing you to directly connect a MIPI-based camera module to various application processors, like the NVIDIA Jetson, Qualcomm QCS6490, and NXP i.MX9x. This is made possible by the Citrobits CrossLinkU-NX-based CBM110 USB bridge/aggregator module, which acts as a bridge between the MIPI camera module and the USB interface. The UVC standard simplifies the process of integrating the camera with the host processor.
ASRock Server Rack
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ASRock Server Rack

NVIDIA's GB200 R and VL 72 combine 72 GPUs, 36 CPUs, and advanced networking into a $3 million unit, protected by 50 secure control FPGAs, exemplifying high performance and security in AI systems.
Automate Stack V4.0
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Lattice Automate™ Stack V4.0

Lattice demonstates the Lattice Automate solution stack that provides Industrial automation system designers with tools needed to evaluate, develop, and deploy FPGA-based, RISC-V software programmable applications.
CAST TSN Endpoint
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CAST TSN Endpoint

This demo features a TSN Ethernet endpoint reference design on the Lattice CertusPro™-NX platform, suitable for industrial automation, automotive, and other applications. The TSN endpoint supports timing synchronization (IEEE 802.1AS), traffic shaping (802.1Qav/Qbv) with pre-emption support (802.1Qbu and 802.3br), and optional redundancy (802.1CB).
CRA Ref Design V1.0
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CRA Ref Design V1.0

The Lattice MachXO3D™ enables the Root of Trust (ROT) on the industrial Exor System on Module (SOM) and supports the Cyber Resilient Architecture (CRA) over OPC UA.
Driver Monitoring System on Lattice Avant™ FPGA
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Driver Monitoring System on Lattice Avant™ FPGA

Watch the driver monitoring system on the Lattice Avant FPGA, which uses advanced AI to analyze driver states like drowsiness and distraction through 3D facial landmarks and head pose analysis. This system runs complex pipelines efficiently, maintaining a 40 FPS rate.
E-Con Systems Multi-Camera Frame Grabber Card
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E-Con Systems Multi-Camera Frame Grabber Card

This demo showcases a robust automotive multi-camera system, featuring a frame grabber card that aggregates video inputs from eight STURDeCAM31 cameras via GMSL and transmits the output to the host through PCI.
El Camino Industrial Control Reference Design Using Ethernet-Based Fieldbus Standards for Remote I/O Communication
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El Camino Industrial Control Reference Design Using Ethernet-Based Fieldbus Standards for Remote I/O Communication

This demo showcases quick evaluation and rapid prototyping with the new Lattice ADI Board. It is ready for PROFINET and EtherCAT industrial communication, supporting remote I/O real-time communication for industrial control solutions utilizing the IEEE Ethernet standard and dedicated industrial protocols. Featuring a PROFINET solution based on the Lattice reference design, this demo provides insights into the operation of various industrial protocols.
Fidus Systems Video Streaming over LTPI (LVDS Tunneling Protocol and Interface)
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Fidus Systems Video Streaming over LTPI (LVDS Tunneling Protocol and Interface)

The Open Compute Project has included the “LVDS Tunneling Protocol & Interface Specification” (LTPI) in the DC-SCM 2 Specification. Featuring Lattice’s LTPI IP running on Lattice MachXO5™-NX hardware, Fidus’ LTPI demo showcases the ease, value, and capabilities of a Lattice-based LTPI solution. The demonstration highlights the tunneling of various standard protocols and the creative utilization of the OEM/Data Channels, all while operating at maximum speed.
Flying Ball Tracking & Catching
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Flying Ball Tracking & Catching

In this demo, we present a robot equipped with advanced camera and radar technologies, designed to catch a ball thrown by a human. The system integrates real-time image and radar data processing to accurately track the ball’s trajectory and position. This demonstration highlights the robot’s precision and responsiveness, showcasing the potential for advanced robotics in dynamic and interactive environments.
Gesture & Gaze
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Gesture & Gaze

This demo showcases the AI capabilities that Lattice sensAI™ will enable on future Lattice FPGAs, focusing on gesture and gaze tracking.
Helion GmbH Smart Home Video Surveillance
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Helion GmbH Smart Home Video Surveillance

This demo features a smart, low-power home video surveillance system based on the Lattice CrossLink™-NX 40 platform. It delivers 1080p30 video with less than 1.5W power consumption for the entire camera. The ispChain used in this demo will be available for customer use across all Lattice Nexus™ and Lattice Avant™ devices.
Industrial HMI
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Industrial HMI

This demo showcases industrial human-machine interface (HMI) with advanced operated attention sensing and identification. Seamlessly connect with your machinery, gaining real-time insights and control.
Intel Lincoln City Reference Architecture with Lattice FPGAs
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Intel Lincoln City Reference Architecture with Lattice FPGAs

This demonstration showcases the Intel Lincoln City Reference Architecture, which incorporates 6 Lattice FPGAs. Designed as an Intel® Birch Stream-AP 1S Cloud Product Reference, it features Intel® 4.0 Platform Firmware Resiliency (PFR) using the Lattice Mach-NX device.
intoPIX RAW Bayer Compressed Video Data Transported Over Ethernet Using TicoRAW
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intoPIX RAW Bayer Compressed Video Data Transported Over Ethernet Using TicoRAW

Discover how integrating TicoRAW technology into the Holoscan SDK reference design revolutionizes video data transfer. This demo showcases the seamless compression and transmission of RAW Bayer video data over Ethernet, highlighting the efficiency and quality preservation of TicoRAW.
Lattice Avant Showcase
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Lattice Avant Showcase

Watch this video to see how Lattice Avant™ FPGAs are taking low power to new heights.
Lattice Avant™-G and Lattice Avant™-X JESD204B (ORAN)
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Lattice Avant™-G and Lattice Avant™-X JESD204B (ORAN)

This demo highlights the capabilities of JESD204B, supporting data rates up to 9.8 Gbps. This demo is for ORAN and 5G.
Lattice Avant™-G and Lattice Avant™-X PCIe Gen4x8
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Lattice Avant™-G and Lattice Avant™-X PCIe Gen4x8

This demo showcases the high-speed data transfer capabilities of PCIe Gen4, highlighting its impressive throughput performance.
Lattice CrosslinkU-NX USB3 Vision (U3V) Reference Design
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Lattice CrosslinkU-NX USB3 Vision (U3V) Reference Design

The USB3 Vision Reference Design with Lattice CrosslinkU-NX device enables video streaming solution from external image sensor to host through MIPI <-> USB3. This solution is in compliance with USB3 Vision standard V1.2 which is widely applicable in Industrial and IOT segment. U3V RD provides methods for camera control, triggering, synchronization through software integration that follows GenICam standard.
Lattice Drive 2.0 Driver Monitoring System (DMS) on ARM
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Lattice Drive 2.0 Driver Monitoring System (DMS) on ARM

The Lattice Drive™ DMS demo showcases advanced facial landmark and gaze tracking technology to monitor the driver’s attention and fatigue levels. This system enhances driver safety by providing real-time assessments and alerts, ensuring a more secure and attentive driving experience. Discover how Lattice Drive DMS leverages cutting-edge technology to promote safer roads.
Lattice Fully Functional FPGA- based BMC
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Lattice Fully Functional FPGA- based BMC

Baseboard management controller or BMC tackles all server management functions – Health management and full remote management. Lattice has a FPGA based BMC solution running on Lattice ECP5 FPGA with SW solution implemented by Raptor Engineering. Arctic Tern is a soft BMC solution from Raptor Engineering that can replace proprietary BMC for servers. Arctic Tern is an FPGA system that runs the Kestrel soft BMC and can be plugged into existing servers to replace the BMC functionality commonly done by ASICs with proprietary software.
Lattice Plug and Play PFR​
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Lattice Plug and Play PFR​

The Caliptra scope decouples and enables a hardware Root of Trust (RoT) for secure boot, attestation, and Zero Trust Architecture by ensuring system integrity. This setup allows platform integrity capabilities to be enforced and evolve independently through other platform devices or services, such as updates, protection, and recovery. The demonstration showcases the Lattice Platform RoT PFR solution working with multiple Caliptra-enabled devices.
Lattice Sentry 4.0 with DC-SCM Single Chip Solution (PFR +LTPI)
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Lattice Sentry 4.0 with DC-SCM Single Chip Solution (PFR +LTPI)

This solution integrates Lattice Sentry 4.0 Platform Firmware Resilience (PFR) and DC-SCM CPLD (LTPI) into a single chip. It utilizes a single Lattice MachXO5™ (LFMXO5-55TD) device.
Leopard Imaging Holoscan Ethernet Cameras
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Leopard Imaging Holoscan Ethernet Cameras

This demonstration features Leopard Imaging Holoscan Ethernet Cameras, offering multiple resolutions and image sensor types. Enabled by Lattice CertusPro™ and NVIDIA Holoscan technology, these edge AI vision solutions support 2MP global shutter mono/stereo cameras and high-performing rolling shutter cameras ranging from 4K to 12MP, with dual 10G Ethernet channels.
Logic Fruit Technologies Inc. ARINC 818-3 IP
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Logic Fruit Technologies Inc. ARINC 818-3 IP

Logic Fruit Technologies designed and implemented the ARINC 818-3 transmitter and receiver IP core to support multiple line rates up to 24x. This IP core adheres to the DO-254 methodology and boasts a DAL-B certification. In this demo, we have successfully ported our IP onto the Lattice CertusPro™-NX FPGA, showcasing its robust performance and versatility.
Lumotive Beam Steering Chip-Based Lidar
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Lumotive Beam Steering Chip-Based Lidar

This demonstration showcases Light Surface Metamaterial (LCM) technology for advanced beam steering. Similar to developing a camera module, it features software-defined ROI capabilities for Virtual lidars. This cutting-edge technology offers extended range, higher FPS, and enhanced resolution, all dynamically driven by object detection or perception layers.
Macnica Practical Design for Customers Using Lattice PCIe IP
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Macnica Practical Design for Customers Using Lattice PCIe IP

Introducing the PCIe Rapid Start Project: Developed by Macnica for Lattice users unfamiliar with PCIe, this project utilizes minimal resources while meeting the needs of the industrial market with its Gen 2 x 1 design. Key features include interrupt support, sufficient timing margin, and practical DMA control, known as “Smart DMA.” This package is designed to facilitate the adoption of Lattice devices and expedite development for customers.
Agiliad Navigation Robot with SLAM Using Lattice FPGAs and NVIDIA GPUs
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Agiliad Navigation Robot with SLAM Using Lattice FPGAs and NVIDIA GPUs

Experience the future of robotics with Agiliad and Lattice’s collaborative solution—a mobile platform capable of navigating dynamic environments. Built on the Lattice Avant™-E FPGA and NVIDIA’s Jetson Orin, this robot demonstrates real-time decision-making and obstacle avoidance. It features an advanced sensor fusion system, incorporating a Lattice vision kit, lidar, and Radar, enabling precise perception of its surroundings.
Analog Devices Enabling Edge AI with GMSLTM to Holoscan Sensor Bridge for Industrial, Healthcare, Automotive and Beyond​
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Analog Devices Enabling Edge AI with GMSL™ to Holoscan Sensor Bridge for Industrial, Healthcare, Automotive and Beyond​

Explore how GMSL-enabled cameras connect to the Jetson AGX Orin Developer Kit via direct MIPI and the Lattice Holoscan Sensor Bridge, featuring 10GbE connectivity.
MIPI – Ethernet – HDMI Reference Design
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MIPI – Ethernet – HDMI Reference Design

Experience the cutting-edge MIPI-Ethernet-HDMI Reference Design, where 4K video is captured from dual MIPI CSI-2 D-PHY camera sensors, seamlessly aggregated, and transmitted over a 25 Gb Ethernet connection powered by the Lattice Avant-X FPGA. The receiver extracts video data from the Ethernet packets and enhances the video quality using advanced Lattice video IP. Finally, the video is displayed on the screen via the HDMI interface.
MissingLink Electronics Industrial SMART NIC
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MissingLink Electronics Industrial SMART NIC

Demonstrating Full Network Protocol Acceleration on the Lattice Avant™-G70.
MosChip Company Opensource RISC-V Core Running Zephyr RTOS on Various Lattice FPGAs
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MosChip Company Opensource RISC-V Core Running Zephyr RTOS on Various Lattice FPGAs

This demonstration showcases the open-source Zephyr RTOS running on a RISC-V core with Lattice FPGA and various peripherals. By combining Zephyr and RISC-V, we create a reliable and flexible open-source embedded system. This approach leverages the community development ecosystem for faster time to market while maximizing customization features as needed.
mVision CPNX DisplayPort to PCIe
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Lattice mVision™ CPNX DisplayPort to PCIe

CertusPro™-NX DisplayPort to PCIe Bridge design demonstrates the functionality of transferring DisplayPort video data to a computer through PCIe with a Direct Memory Access (DMA) engine. This demo is based on the CertusPro-NX PCIe Bridge Board with Linux Operating System (OS) driver support that shows transfer of 4K60 video data to the computer memory and rendering of the data as video on the computer screen using the software driver.
mVision CPNX MIPI DSI to DisplayPort
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Lattice mVision™ CPNX MIPI DSI to DisplayPort

CertusPro™-NX MIPI DSI to DisplayPort Bridge design features a MIPI D-PHY receiver front-end configuration with four lanes. The bridge decodes MIPI DSI 24bpp RGB888 packets and converts the formatted video data stream to a DisplayPort Interface supporting up to four lanes at 5.4Gbps.
Neurala DNN Acceleration with Lattice CertusPro™-NX
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Neurala DNN Acceleration with Lattice CertusPro™-NX

This demo showcases the use of Neurala’s patented L-DNN technology, where AI model processing is efficiently shared between a Lattice FPGA and a Raspberry Pi (RasPi). The neural network (NN) backbone is processed on the Lattice CertusPro™-NX, while the NN head runs on the companion chip (RasPi). This setup demonstrates the seamless integration and collaborative processing capabilities of Lattice FPGAs and RasPi, highlighting their potential in advanced AI applications.
"Oregano Systems 10 Gbit High-Accuracy PTP Solution "
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Oregano Systems 10 Gbit High-Accuracy PTP Solution

This latest addition to the syn1588 product family is a low-power, high-accuracy PTP-enabled 10Gbit Ethernet network interface card, utilizing Oregano Systems’ sophisticated PTP IP cores. Based on the Lattice CertusPro™-NX device, this demo will showcase its interaction with a high-performance 10Gbit PTP Grandmaster from Meinberg Funkuhren.
PQShield Lattice Semiconductor’s Smallest Footprint CSNA 2.0 Secure Boot
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PQShield Lattice Semiconductor’s Smallest Footprint CSNA 2.0 Secure Boot

This demonstration features the Lattice MachXO3D™ and PQShield’s PQCryptolib, embedded to implement a secure boot based on LMS (Leighton-Micali Signature) and XMSS (eXtended Merkle Signature Scheme). This setup ensures robust security for embedded systems.
RCS (Rapid Context Switch)
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RCS (Rapid Context Switch)

This demo showcases Rapid Context Switch (RCS), which enables secure updates to the Lattice FPGA with minimal downtime.
sensAI Studio
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Lattice sensAI™ Studio

In this demo, users can explore the latest tools from Lattice. They will have the opportunity to run examples for FPGA simulation, neural network training, and compilation for specific devices.
Sensor Fusion - Radar, LiDAR, Camera + Robot Arm control
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Sensor Fusion - Radar, Lidar, Camera + Robot Arm Control

This demo processes radar, LiDAR, and camera sensors simultaneously, showcasing the fused data processing among the sensors in real time. It demonstrates the flexibility of I/O and the computing power to handle multiple sensors and machine learning (ML). Sensor data (camera, radar, pressure) is pre-processed by the FPGA and sent to the CPU (Raspberry Pi) over PCIe. The CPU controls the robot arm and sends position info back to the FPGA, which generates commands for the arm.
Server Management Application with Lattice OpenBIC Solution
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Server Management Application with Lattice OpenBIC Solution

The demo showcases the Open Baseboard Interface Controller solution with Meta YB3 server solution, The Lattice FPGA collects all sensor information and passes the information to BMC.
Single SCM and Dual HPM LTPI solution
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Single SCM and Dual HPM LTPI solution

This demo is designed to support two separate Host Processor Modules (HPMs) with a single Security Control Module (SCM). It supports two independent LVDS Tunneling Protocols and Interfaces (LTPI) over a single SCM CPLD design.
SLS MIPI Cameras to USB3 Bridging Using USB Video Class & RAW Data Transfer over USB3
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SLS MIPI Cameras to USB3 Bridging Using USB Video Class & RAW Data Transfer over USB3

Dual MIPI D-PHY CSI-2 to USB3 Video Class Bridge on Lattice CrossLink™-NX: Seamlessly convert MIPI streams to USB3 with our cutting-edge FPGA design. This solution leverages the OS’s built-in USB Video Class driver, eliminating the need for USB driver development.Real-Time USB3 Throughput Measurement Using Lattice CrossLinkU™-NX: This demonstration accurately assesses data transfer speeds to ensure optimal performance. The Lattice CrossLinkU-NX platform provides a robust and reliable environment for capturing high-speed data.
Solid Silicon and Raptor Engineering X1 Static
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Solid Silicon and Raptor Engineering X1 Static

Solid Silicon X1 system in package embeds Lattice FPGA technology with OpenPOWER CPUs delivering fully self-sovereign, verifiable control down to the silicon - delivered with fully open-source firmware and tools.
Lattice Platform Root of Trust for Multiple Caliptra Attested Devices
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Lattice Platform Root of Trust for Multiple Caliptra Attested Devices

Caliptra scope decouples enables a hardware Root of Trust for secure boot, attestation and Zero Trust Architecture by ensuring system integrity. platform integrity capabilities that can be enforced and evolve independently through other platform devices or services – such as update, protection, and recovery. The demonstration shown here is - Lattice Platform RoT PFR solution working with multiple Caliptra enabled devices.
Synopsys FPGA Synthesis and Verification Solution for High Reliability
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Synopsys FPGA Synthesis and Verification Solution for High Reliability

Ensuring safety and high reliability is critical in FPGA-based applications for space satellites, industrial automation, and self-driving vehicles. Synopsys Synplify offers essential automated safety and reliability features in FPGA synthesis, including TMR, Hamming-3, ECC, Error Flag insertion, and hardware-level fault injections to ensure proper FPGA design operation. Additionally, Synopsys provides a comprehensive suite of integrated FPGA verification products, such as Euclid IDK, VCS, Verdi, SpyGlass, and Z01X, to meet all FPGA verification needs.
Device Attestation Over LTPI
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Device Attestation Over LTPI

Lattice provides peripheral device attestation between the Host Processor Module (HPM) and the Security Control Module (SCM) using the LTPI channel. This attestation over LTPI aggregates the Management Component Transport Protocol (MCTP) and is fully compliant with SPDM attestation standards.
Tecphos GigEVision and CoaXPress IP for Lattice CertusPro™-NX
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Tecphos GigEVision and CoaXPress IP for Lattice CertusPro™-NX

This demo showcases the Lattice CertusPro™-NX FPGA receiving a video stream over coax from an off-the-shelf CoaXPress camera and delivering that video stream over Ethernet to a standard PC, which will display the video stream on a monitor.
TinyVision.ai Object Detection/Tracking on CrosslinkU-NX33: StreamLogic
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TinyVision.ai Object Detection/Tracking on CrosslinkU-NX33: StreamLogic

This demonstration showcases Object Detection/Tracking on CrosslinkU-NX33 with StreamLogic, utilizing the TinyVision tinyCLUNX33 SoM and a no-code GUI with RTL generation. Features include an ISP supporting 1920x1080 at 30 fps, advanced image processing, and accelerated object detection based on edge detection.
TinyVision.ai tinyCLUNX33 SoM Lattice CrossLinkU-NX33​
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TinyVision.ai tinyCLUNX33 SoM Lattice CrossLinkU™-NX33

The tinyCLUNX33 SoM featuring the Lattice CrossLinkU-NX33 is a highly integrated, production-friendly System on Module designed for rapid prototyping with a clear path to production.
Virtual Incision Holoscan Sensor Bridge Surgical Robotic Camera Prototype
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Virtual Incision Holoscan Sensor Bridge Surgical Robotic Camera Prototype

Virtual Incision is partnered with NVIDIA and Lattice Semiconductor to build a next-generation surgical robot platform with Holoscan Sensor Bridge technology. This is an early-stage technical demonstration of a single-chip Sensor Bridge solution built with the Lattice CertusPro-NX and the NVIDIA Jetson IGX. In addition to the Holoscan Sensor Bridge IP, the FPGA also runs a RISC-V soft core used to command and control the image sensor as well as the mechatronics package of the camera.
VVDN Thermal Core and Weapon Sight
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VVDN Thermal Core and Weapon Sight

The Thermal Core and weapon sight is designed for defense applications, providing intelligent night vision capabilities for tactical forces. It enables thermal weapon sight and identification of weapons while processing at the edge. The Lattice MachXO3™ Family 2100 Cells 65nm Technology 1.2V 49-Pin WLCSP T/R is used to convert parallel (8-bit) video data to MIPI-CSI, playing a crucial role in the overall edge processing.
Waves Nx Immersive 3D Audio with Headtracking
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Waves Nx Immersive 3D Audio with Headtracking

Experience unparalleled sound localization with Nx’s Lattice Maze Yaw MetaData headtracking. This advanced technology precisely tracks even the slightest head movements, ensuring a stable acoustic environment and delivering highly realistic and accurate sound perception.
Xiphera Post-Quantum Cryptography (PQC)
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Xiphera Post-Quantum Cryptography (PQC)

Xiphera designs and implements hardware-based security using proven cryptographic algorithms. The secure and highly optimized cryptographic IP cores are designed directly for FPGAs and ASICs without software components. Xiphera’s xQlave® Post-Quantum Cryptography (PQC) family offers quantum-secure key exchange and digital signatures based on the PQC algorithms standardized by the National Institute of Standards and Technology (NIST). The PQC IP cores run on traditional computing platforms, being resilient against both quantum and traditional security attacks.
XMSS and LMS Digital-Signature System
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XMSS and LMS Digital-Signature System

This demonstration features the Lattice MachXO3D™ and PQShield’s PQCryptolib, embedded to implement a secure boot based on LMS (Leighton-Micali Signature) and XMSS (eXtended Merkle Signature Scheme). This setup ensures robust security for embedded systems.
Yongatek Lattice ORAN™ Radio Unit Implemented on CPNX-100
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Lattice ORAN™ Radio Unit Implemented on CPNX-100

In this demo, we introduce the Lattice ORAN™ Radio Unit (O-RU), which features advanced capabilities such as Lower PHY baseband processing on the Lattice CertusPro™-NX FPGA. It includes FFT/IFFT, CP addition and removal, PRACH filtering, and digital beamforming. The O-RU supports up to 4 transmit and 4 receive antennas (4T4R), offers an RF bandwidth of 100MHz, and operates at frequencies up to 6GHz. Additionally, it has Ethernet interfaces for I&Q sample exchange with Higher PHY and a JESD204B interface with RFFE, highlighting its robust performance and versatility in modern communication systems.
Lattice NC SI Network Card Management over USB
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Lattice NC SI Network Card Management over USB

Lattice USB to RMII bridge for network card management using NC-SI.
Lattice and NVIDIA Edge AI Solution
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Lattice and NVIDIA Edge AI Solution

Lattice Semiconductor and NVIDIA have developed an Edge AI solution that simplifies and accelerates the deployment of intelligent edge systems by enabling rapid design of connectivity bridging applications from sensor to compute. The Sensor Bridge Reference design, implemented on the CertusPro-NX Sensor to Ethernet Bridge Board, seamlessly integrates with Nvidia Holoscan Sensor Bridge, offering programmable system control, configurable FPGA IP, and a full stack solution for data acquisition and processing, along with a standard API supporting various interfaces and protocols.

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