Defect Detection Reference Design

Edge AI Accelerated Object Detection On FPGA

The Defect Detection Reference Design enables real-time identification and classification of defects in manufacturing, assembly, and inspection processes at the edge. Built on the Lattice CertusPro-NX FPGA System-on-Module (SOM), this solution integrates compute, memory, connectivity, and AI acceleration for robust, low-power vision intelligence in industrial automation and quality control applications.

This reference design supports:

  • Detection of surface defects, cracks, scratches, and anomalies on products or components
  • Classification of defect types and severity in real time
  • Dynamic overlay of defect locations and labels on video output
  • Scalable architecture for high-resolution image processing
  • Seamless integration with host processors (e.g., Raspberry Pi CM5) via MIPI and I2C
  • Flexible deployment for automated inspection, sorting, and process optimization

Features

  • Instantly identify and classify defects, enabling rapid response and corrective action
  • Efficient AI models optimized for edge devices, supporting continuous inspection
  • Supports a wide range of defect types and deployment scenarios
  • Easily connects to existing inspection systems and legacy infrastructure
  • Accurate detection for improved product quality and reduced waste

Block Diagram

Defect Detection Reference Design Block Diagram

Documentation

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Defect Detection Reference Design and Demonstration Documentation
To learn more about this product design and to access the complete source code, bitstream and user guide in GitHub, please click here
1/18/2026 WEB

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