XO2 BGA Chip

MachXO2 FPGA Family

Flexible. Reliable. Affordable. The instant-on FPGA for system control functions.

Instant-on FPGAs, for the control freak in you – With boot-up times faster than 1 ms the MachXO2 can rapidly take control of signals during power-up for reliable operation and minimal field failures.

More voltages, more savings – With 3.3/2.5 V and 1.2 V versions, you can choose to operate the MachXO2 from a convenient power supply that is available early during system power-up.

Packages for everyone – The MachXO2 is available in a wide variety of packages with easy-to-manufacture 1.0 mm and 0.8 mm ball pitches.

Testing 4

The award-winning MachXO2 is the perfect device for quickly implementing system control functions.   Reliable and affordable – it’s what all other PLDs aspire to for routers, base stations, servers, storage, industrial and medical applications. Available in three versions, HC (high-performance, 3.3/2.5 V,) HE (high-performance, 1.2 V,) and ZE (low-power, 1.2 V.)

Start Innovating – We Make it Easy and Affordable

  • Over 30 reference designs
  • Evaluation kits under $29
  • Free Diamond development tool

Customize Your Design. And Customize it Again.

  • Fully programmable via design software
  • On-chip Flash provides single-chip solution
  • TransFR feature allow design updates while equipment operates

Maximum Control. Minimum Boot-up.

  • Instant-on 1 ms boot-up
  • Operate off a single 3.3/2.5 V power supply
  • Hot-socketable I/Os avoid excessive leakage
  • Hysteresis on inputs provides noise immunity with slow signals
  • I/Os default to pull-down to avoid "shark-fin" glitches at power up

SPI? I2C? It’s in there.

  • Timer counter
  • Two I2C interfaces
  • SPI interface
  • User Flash memory

MachXO2 Device Selection Guide

Parameters XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
Density LUTs 256 640 640 1280 1280 2112 2112 4320 6864
EBR RAM (Kbits) 0 18 64 64 74 74 92 92 240
EBR RAM Blocks (9 Kbits/block) 0 2 7 7 8 8 10 10 26
Dist. SRAM (Kbits) 2 5 5 10 10 16 16 34 54
User Flash Memory (Kbits) 0 24 64 64 80 80 96 96 256
PLL 0 0 1 1 1 1 2 2 2
Packages (I/O + Dedicated Inputs)
25-ball WLCSP (2.5x2.5 mm)1 18
32-pin QFN (5x5 mm) 21
49-ball WLCSP (3.2x3.2 mm)1 38
64-ball ucBGA (4x4 mm) 44
100-pin TQFP (14x14 mm) 55 78 79 79
132-ball csBGA (8x8 mm) 55 79 104 104 104
144-pin TQFP (20x20 mm) 107 107 111 114 114
184-ball csBGA (8x8 mm)2 150
256-ball caBGA (14x14 mm) 206 206 206
256-ball ftBGA (17x17 mm) 206 206 206 206
332-ball caBGA (17x17 mm) 274 278
484-ball fpBGA (23x23 mm) 278 278 334
Typical Static Power
ZE (mW) 0.019 0.033 0.070 0.098 0.153 0.230
HC (mW) 4 7 13 13 18 18 32 32 48
HE (mW) 2 3 3 5

Note: Ultra high I/O count devices (640U, 1200U, 2000U) are available in the HC and HE options only
125 & 49-WLCSP are offered for ZE devices only
2Contact your Lattice sales representative for the support of the 184-ball csBGA package, available with the HE option only

Microprocessor Interface Expansion

  • Save cost by adding GPIO to low-cost microcontrollers
  • Add additional SPI and I2C interfaces to system control processors
  • Quickly add high-performance DDR SRAM and Flash memory interfaces
  • Simplify system management with PLD implementation of system status registers

Timing Offload for Improved Performance of Real-Time Functions

  • Precisely control signals during system power-up with instant-on logic
  • Implement PWM functions to precisely generate analog voltages for lighting and motor control
  • Build sensor buffers and smart interrupts to ensure real world events are captured
  • Use hardware UARTs to overcome performance limitations of software implementations

Increase System Performance through Hardware Acceleration

  • Reduce processor workload with logic-based signal filtering
  • Rotate, scale and combine images with minimal processor overhead

Select the Ideal Components for Your Design Using Flexible Interface Bridging

  • Bridge low-cost microcontrollers to common display interfaces such as RGB and 7:1 LVDS
  • Optimize performance and cost by interfacing HiSPi, LVDS or parallel RGB image sensors to almost any processor
  • Maximize component selection flexibility by bridging between voltage domains and interfaces such as SPI, I2C, SDIO, PCI and LPC

Lattice Diamond Design Software

Leading-edge design software for Lattice FPGA families. Upgrade your design process with an easy-to-use interface, superior design exploration, optimized design flow, Tcl scripting and more. Click here to view more information.

MachXO2 Pico Development Kit

The MachXO2 Pico Development Kit is a battery-powered, low-cost evaluation platform to accelerate the evaluation of MachXO2 PLDs. The kit features the MachXO2-1200ZE device, a 7-segment LCD display, I2C temperature sensor and an expansion header for I2C, JTAG, and GPIO interfacing. Click here to view more information.

MachXO2 Breakout Board

The MachXO2 Breakout Board is a simple, low-cost board that provides convenient access to densely-spaced I/Os. Each I/O on the device is connected to a 100-mil header hole. By adding test probes, jumper wires, or pin headers to the board, you can easily evaluate function and performance through the sysIO buffers of the MachXO2. Click here to view more information.

MachXO2 FPGA Family Application Note

  TITLE NUMBER VERSION DATE FORMAT SIZE
Designing for Migration from MachXO2-1200-R1 to Standard (Non-R1) Devices AN8086 01.2 4/3/2012 PDF 395 KB
Implementing High-Speed Interfaces with MachXO2 Devices TN1203 1.7 1/2/2014 PDF 5.9 MB
Implementing High-Speed Interfaces with MachXO2 Devices (Japanese) TN1203J 1.7 1/1/2014 PDF 2.9 MB
MachXO2 Hardware Checklist TN1208 1.5 1/15/2014 PDF 347.2 KB
MachXO2 Programming and Configuration Usage Guide TN1204 3.0 2/2/2014 PDF 4 MB
MachXO2 Programming and Configuration Usage Guide (Japanese Language Version) TN1204J 3.0 2/1/2014 PDF 2.1 MB
MachXO2 SED Usage Guide TN1206 1.9 12/12/2013 PDF 762.7 KB
MachXO2 SED Usage Guide (Japanese Language Version) TN1206J 1.9 12/1/2013 PDF 349.1 KB
MachXO2 sysCLOCK PLL Design and Usage Guide TN1199 2.3 6/1/2013 PDF 4.6 MB
MachXO2 sysCLOCK PLL Design and Usage Guide (Japanese Language Version) TN1199J 2.3 6/1/2013 PDF 2.1 MB
MachXO2 sysIO Usage Guide TN1202 1.7 10/2/2013 PDF 2.1 MB
MachXO2 sysIO Usage Guide (Japanese Language Version) TN1202J 1.7 10/1/2013 PDF 1.5 MB
Memory Usage Guide for MachXO2 Devices TN1201 01.3 7/9/2013 PDF 4.7 MB
Memory Usage Guide for MachXO2 Devices (Japanese Language Version) TN1201J 1.3 7/1/2013 PDF 2.2 MB
PCB Layout Recommendations for BGA Packages TN1074 2.8 4/1/2014 PDF 8.4 MB
PCB Layout Recommendations for Leaded Packages TN1257 01.3 10/20/2013 PDF 2.1 MB
Power Decoupling and Bypass Filtering for Programmable Devices TN1068 01.0 5/1/2004 PDF 31.4 KB
Power Estimation and Management for MachXO2 Devices TN1198 01.4 12/19/2012 PDF 1.1 MB
Power Estimation and Management for MachXO2 Devices (Japanese Language Version) TN1198J 1.3 12/26/2012 PDF 548.6 KB
Solder Reflow Guide for Surface Mount Devices TN1076 3.0 8/7/2013 PDF 425.9 KB
Thermal Management 2.1 8/7/2013 PDF 800.5 KB
Using TraceID TN1207 1.3 3/3/2014 PDF 719.3 KB
Using TransFR Technology TN1087 3.5 3/4/2014 PDF 2.4 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices TN1205 4.3 1/15/2014 PDF 3.1 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices (Japanese Language Version) TN1205J 4.2 8/1/2013 PDF 1.3 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide TN1246 1.8 3/26/2014 PDF 5.8 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide (Japanese Language Version) TN1246J 1.6 1/1/2014 PDF 3.5 MB
Wafer-Level Chip-Scale Package Guide TN1242 01.0 7/13/2011 PDF 127.2 KB

MachXO2 FPGA Family Data Sheet

  TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 100-Pin TQFP Package Migration File 01.4 3/23/2012 CSV 12 KB
MachXO2 132-Pin csBGA Package Migration File 01.4 3/23/2012 CSV 19.4 KB
MachXO2 144-Pin TQFP Package Migration File 01.3 3/23/2012 CSV 22.3 KB
MachXO2 256-Pin caBGA Package Migration File 01.3 3/23/2012 CSV 23.6 KB
MachXO2 256-Pin ftBGA Package Migration File 01.3 3/23/2012 CSV 31.3 KB
MachXO2 332-Pin caBGA Package Migration File 01.3 3/23/2012 CSV 20.4 KB
MachXO2 484-Pin fpBGA Package Migration File 01.3 3/23/2012 CSV 39.8 KB
MachXO2 Family Data Sheet DS1035 2.4 2/26/2014 PDF 8.1 MB
MachXO2-1200 Pinout 1.1 3/23/2012 CSV 7.4 KB
MachXO2-1200U Pinout 1.1 3/23/2012 CSV 13.1 KB
MachXO2-2000 Pinout 1.2 2/14/2014 CSV 18.3 KB
MachXO2-2000U Pinout 1.1 3/23/2012 CSV 30.5 KB
MachXO2-256 Pinout 1.2 3/23/2012 CSV 6 KB
MachXO2-4000 Pinout 1.2 2/1/2013 CSV 34 KB
MachXO2-640 Pinout 1.2 3/23/2012 CSV 5.6 KB
MachXO2-640U Pinout 1.1 3/23/2012 CSV 6 KB
MachXO2-7000 Pinout 1.1 3/23/2012 CSV 30.4 KB
Package Diagrams 4.3 3/2/2014 PDF 12 MB

MachXO2 FPGA Family Family Qualifications Summary

  TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Product Family Qualification Summary F 3/7/2013 PDF 953.6 KB

MachXO2 FPGA Family Hand Book

  TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Family Handbook HB1010 03.8 5/16/2013 PDF 39.3 MB

MachXO2 FPGA Family Product Brochure

  TITLE NUMBER VERSION DATE FORMAT SIZE
I0229J Ultra Low Density FPGAs Brochure (Japanese Language) 5/22/2013 PDF 2.2 MB
MachXO2 Product Brief I0221 4/4/2012 PDF 8 MB
MachXO2 WLCSP Packaging News Brief NB105 9/26/2011 PDF 517.1 KB
MIPI Display Serial Interface Solution Product Flyer 12.2 10/22/2013 PDF 1.1 MB
Product Selector Guide I0211 10/5/2012 PDF 2.5 MB

MachXO2 FPGA Family Product Change Notification

  TITLE NUMBER VERSION DATE FORMAT SIZE
ACN#03D-11 Withdrawal of ACN#03C-11 1 4/1/2011 PDF 796.6 KB
Notification of Intent to Transition from the MachXO2-1200 �R1� to the Standard MachXO2-1200 Ordering Part Number 5/22/2013 PDF 56.2 KB
Notification of Intent to Utilize an Alternate Qualified Mask Set for the Lattice MachXO2 256ZE Devices 5/22/2013 PDF 106.6 KB
PCN 09A-12 Affected Devices 5/14/2012 XLSX 121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families 5/22/2013 PDF 160.2 KB
PCN 09A-12 Frequently Asked Questions 1.0 5/11/2012 PDF 178.9 KB
PCN 09A-12 Material Set Changes 5/14/2012 XLSX 121 KB
PCN# 06B-12 Notification of Changes to the MachXO2 Family Datasheet 5/22/2013 PDF 211.8 KB
PCN#06C-11 Withdrawal of PCN#06B-11 5/22/2013 PDF 838.5 KB
PCN#07C-11 Withdrawal of PCN#07B-11 5/22/2013 PDF 917.9 KB
PCN03A-13 Affected Part Number and Material Sets PCN03A-13 6/28/2013 XLSX 69.1 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices PCN03A-13 6/28/2013 PDF 202.5 KB
PCN03A-13 Device Characterization Report PCN03A-13 6/28/2013 PDF 981.3 KB
PCN03A-13 FAQs PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03A-14 Affected Part Number List PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03A-14 Characterization Report PCN03A-14 1.0 4/4/2014 PDF 880.3 KB
PCN03A-14 FAQ PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Material Set Table PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03A-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products PCN03A-14 1.0 4/4/2014 PDF 206.8 KB
PCN08A13_AffectedDevices PCN08A-13 1 9/26/2013 XLSX 78.2 KB
PCN10A13_AffectedPartNumbers PCN10A-13 1 9/26/2013 XLSX 33 KB

MachXO2 FPGA Family Quality Assurance

  TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Product Family Qualification Summary G 7/1/2013 PDF 953.6 KB

MachXO2 FPGA Family Schematic Symbols

  TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB) 1.15 2/27/2014 ZIP 861.6 KB

MachXO2 FPGA Family User Manual

  TITLE NUMBER VERSION DATE FORMAT SIZE
DDR & DDR2 SDRAM Controller- Pipelined (MachXO2) IP Core User's Guide ipug93 01.1 2/13/2012 PDF 3.3 MB
DDR2 SDRAM IP Core User's Guide IPUG105 01.0 5/22/2013 PDF 3.5 MB
Display Interface Multiplexer User's Guide ipug95 01.0 11/8/2010 PDF 983.2 KB
I2C Slave Peripheral using Embedded Function Block RD1124 1.0 5/1/2012 PDF 1.9 MB
LPDDR SDRAM Controller IP Core User's Guide IPUG92 01.2 10/5/2012 PDF 2.7 MB
MachXO2 Hardened I2C Master/Slave Demo User's Guide UG55 1.0 5/1/2012 PDF 1.4 MB
MachXO2 Hardened SPI Master/Slave Demo UG56 01.1 5/24/2012 PDF 682.1 KB
MachXO2 I2C Embedded Programming Access Firmware User's Guide RD1129 1.0 5/18/2012 PDF 3.3 MB
MachXO2 Low Power Control Demo User's Guide UG58 1.0 5/1/2012 PDF 1.2 MB
MachXO2 Master SPI/I2C Demo Using C User's Guide UG54 1.0 5/1/2012 PDF 2.8 MB
MachXO2 Programming Via WISHBONE Interface User's Guide UG57 1.0 5/1/2012 PDF 1.3 MB
PCI IP Core User's Guide IPUG18 9.2 11/8/2010 PDF 4.6 MB
RAM-Type Interface for Embedded User Flash Memory RD1126 1.2 5/1/2012 PDF 2.8 MB
SPI Slave Peripheral Using the Embedded Function Block RD1125 01.1 5/1/2012 PDF 1.2 MB

MachXO2 FPGA Family White Paper

  TITLE NUMBER VERSION DATE FORMAT SIZE
Creating An ADC Using FPGA Resources 1.0 3/1/2010 PDF 272.2 KB
Dual Sensor Design Solution - White Paper (Chinese Language Version) 1.0 5/31/2012 PDF 236.6 KB
Expanding Microprocessor Connectivity Using Low-cost FPGAs 1.0 8/28/2013 PDF 474.4 KB
Implementing Video Display Interfaces Using MachXO2 PLDs 1.0 11/8/2010 PDF 173.8 KB
Implementing Video Display Interfaces Using MachXO2 PLDs (Chinese Language) 1.0 11/1/2010 PDF 503.7 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages 1.0 7/1/2010 PDF 443.6 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages (Chinese Language) 1.0 7/1/2010 PDF 488.5 KB
Managing Image Data in Automotive Infotainment Applications Using Low Cost PLDs 1.0 8/4/2011 PDF 325.8 KB
Managing Image Data in Automotive Infotainment Applications Using Low Cost PLDs (Chinese Language) 1.0 8/1/2011 PDF 431.8 KB
Multi-time Programmable ULD FPGAs 1.0 12/1/2013 PDF 163.5 KB
New Approaches to Hardware Acceleration Using Ultra Low Density FPGAs 1.0 8/25/2013 PDF 397 KB
Reducing Cost and Power in Consumer Applications Using PLDs 1.0 11/8/2010 PDF 354.4 KB
Reducing Cost and Power in Consumer Applications Using PLDs (Chinese Language) 1.0 11/1/2010 PDF 496.4 KB
Reducing Cost and Power in Consumer Applications Using PLDs (Traditional Chinese Language) 1.0 3/28/2011 PDF 785.2 KB
Solving Today's Interface Challenges With Ultra-Low-Density FPGA Bridging Solutions 1.0 8/8/2013 PDF 341.4 KB
The Challenges of Automotive Vision Systems Design 4/1/2007 PDF 341.5 KB
Using Low Cost, Non-Volatile PLDs in System Applications 2.0 8/30/2013 PDF 435.3 KB
Using Low Cost, Non-Volatile PLDs in System Applications (Chinese Language) 1.0 11/1/2010 PDF 246.2 KB

MachXO2 FPGA Family BSDL Model

  TITLE NUMBER VERSION DATE FORMAT SIZE
[BSDL] LCMXO2-1200HC csBGA 132 1.03 12/1/2012 BSM 26.1 KB
[BSDL] LCMXO2-1200HC TQFP 100 1.03 12/1/2012 BSM 23.7 KB
[BSDL] LCMXO2-1200HC TQFP 144 1.03 12/1/2012 BSM 26.6 KB
[BSDL] LCMXO2-1200ZE/HE csBGA 132 1.03 12/1/2012 BSM 26.1 KB
[BSDL] LCMXO2-1200ZE/HE TQFP 100 1.03 12/1/2012 BSM 23.7 KB
[BSDL] LCMXO2-1200ZE/HE TQFP 144 1.03 12/1/2012 BSM 26.6 KB
[BSDL] LCMXO2-2000HC caBGA 256 1.03 12/1/2012 BSM 42.8 KB
[BSDL] LCMXO2-2000HC csBGA 132 1.03 12/1/2012 BSM 33.6 KB
[BSDL] LCMXO2-2000HC ftBGA 256 1.03 12/1/2012 BSM 42.8 KB
[BSDL] LCMXO2-2000HC TQFP 100 1.03 12/1/2012 BSM 31.2 KB
[BSDL] LCMXO2-2000HC TQFP 144 1.03 12/1/2012 BSM 34.3 KB
[BSDL] LCMXO2-2000ZE/HE caBGA 256 1.03 12/1/2012 BSM 42.8 KB
[BSDL] LCMXO2-2000ZE/HE csBGA 132 1.03 12/1/2012 BSM 33.6 KB
[BSDL] LCMXO2-2000ZE/HE ftBGA 256 1.03 12/1/2012 BSM 42.8 KB
[BSDL] LCMXO2-2000ZE/HE TQFP 100 1.03 12/1/2012 BSM 31.2 KB
[BSDL] LCMXO2-2000ZE/HE TQFP 144 1.03 12/1/2012 BSM 34.3 KB
[BSDL] LCMXO2-256HC csBGA 132 1.03 12/1/2012 BSM 19.5 KB
[BSDL] LCMXO2-256HC QFN 32 1.03 12/1/2012 BSM 14.7 KB
[BSDL] LCMXO2-256HC TQFP 100 1.03 12/1/2012 BSM 18.6 KB
[BSDL] LCMXO2-256HC ucBGA 64 1.03 12/1/2012 BSM 17 KB
[BSDL] LCMXO2-256ZE QFN 32 1.03 12/1/2012 BSM 14.7 KB
[BSDL] LCMXO2-256ZE/HE csBGA 132 1.03 12/1/2012 BSM 19.5 KB
[BSDL] LCMXO2-256ZE/HE TQFP 100 1.03 12/1/2012 BSM 18.6 KB
[BSDL] LCMXO2-256ZE/HE ucBGA 64 1.03 12/1/2012 BSM 17 KB
[BSDL] LCMXO2-4000HC caBGA 256 1.03 12/1/2012 BSM 47.4 KB
[BSDL] LCMXO2-4000HC caBGA 332 1.03 12/1/2012 BSM 53.4 KB
[BSDL] LCMXO2-4000HC csBGA 132 1.03 12/1/2012 BSM 38.1 KB
[BSDL] LCMXO2-4000HC fpBGA 484 1.03 12/1/2012 BSM 57.7 KB
[BSDL] LCMXO2-4000ZE/HE caBGA 256 1.03 12/1/2012 BSM 47.4 KB
[BSDL] LCMXO2-4000ZE/HE caBGA 332 1.03 12/1/2012 BSM 53.4 KB
[BSDL] LCMXO2-4000ZE/HE csBGA 132 1.03 12/1/2012 BSM 38.1 KB
[BSDL] LCMXO2-4000ZE/HE csBGA 184 1.03 12/1/2012 BSM 42.1 KB
[BSDL] LCMXO2-4000ZE/HE fpBGA 484 1.03 12/1/2012 BSM 57.7 KB
[BSDL] LCMXO2-640HC csBGA 132 1.03 12/1/2012 BSM 22.5 KB
[BSDL] LCMXO2-640HC TQFP 100 1.03 12/1/2012 BSM 21.6 KB
[BSDL] LCMXO2-640ZE/HE csBGA 132 1.03 12/1/2012 BSM 22.5 KB
[BSDL] LCMXO2-640ZE/HE TQFP 100 1.03 12/1/2012 BSM 21.6 KB
[BSDL] LCMXO2-1200UHC ftBGA 256 1.03 12/1/2012 BSM 42.7 KB
[BSDL] LCMXO2-1200ZE WLCSP 25 1.03 12/1/2012 BSM 17.7 KB
[BSDL] LCMXO2-2000UHC fpBGA 484 1.03 12/1/2012 BSM 57.8 KB
[BSDL] LCMXO2-4000HC ftBGA 256 1.03 12/1/2012 BSM 47.4 KB
[BSDL] LCMXO2-4000HC TQFP 144 1.03 12/1/2012 BSM 39 KB
[BSDL] LCMXO2-4000ZE/HE ftBGA 256 1.03 12/1/2012 BSM 47.4 KB
[BSDL] LCMXO2-4000ZE/HE TQFP 144 1.03 12/1/2012 BSM 39 KB
[BSDL] LCMXO2-640UHC TQFP 144 1.03 12/1/2012 BSM 26.6 KB
[BSDL] LCMXO2-7000HC caBGA 256 1.03 12/1/2012 BSM 51.2 KB
[BSDL] LCMXO2-7000HC caBGA 332 1.03 12/1/2012 BSM 57.4 KB
[BSDL] LCMXO2-7000HC fpBGA 484 1.03 12/1/2012 BSM 64.8 KB
[BSDL] LCMXO2-7000HC ftBGA 256 1.03 12/1/2012 BSM 51.2 KB
[BSDL] LCMXO2-7000HC TQFP 144 1.03 12/1/2012 BSM 42.8 KB
[BSDL] LCMXO2-7000ZE/HE caBGA 256 1.03 12/1/2012 BSM 51.2 KB
[BSDL] LCMXO2-7000ZE/HE caBGA 332 1.03 12/1/2012 BSM 57.4 KB
[BSDL] LCMXO2-7000ZE/HE fpBGA 484 1.03 12/1/2012 BSM 64.8 KB
[BSDL] LCMXO2-7000ZE/HE ftBGA 256 1.03 12/1/2012 BSM 51.2 KB
[BSDL] LCMXO2-7000ZE/HE TQFP 144 1.03 12/1/2012 BSM 42.8 KB

MachXO2 FPGA Family Design File

  TITLE NUMBER VERSION DATE FORMAT SIZE
BGA Breakout and Routing Example - BG256 TN1074 1.0 1/18/2012 ZIP 851.1 KB
BGA Breakout and Routing Example - BG332 TN1074 1.0 1/18/2012 ZIP 847 KB
BGA Breakout and Routing Example - FG484 TN1074 1.0 1/18/2012 ZIP 1.1 MB
BGA Breakout and Routing Example - FTG256 TN1074 1.0 1/18/2012 ZIP 806 KB
BGA Breakout and Routing Example - MG132 TN1074 1.0 1/18/2012 ZIP 773.6 KB
BGA Breakout and Routing Example - UMG64 TN1074 1.0 1/18/2012 ZIP 630.2 KB
MachXO2 Hardened I2C Master/Slave Demo 2.0 5/1/2012 ZIP 914.3 KB
MachXO2 Hardened I2C/SPI Master Demo Using C 1.0 5/1/2012 ZIP 4 MB
MachXO2 Hardened SPI Master/Slave Demo 1.1 5/24/2012 ZIP 423.1 KB
MachXO2 Low Power Control Demo 1.0 5/1/2012 ZIP 937.2 KB
MachXO2 Programming Via WISHBONE Interface 1.0 5/1/2012 ZIP 702.4 KB
MN34041 Sensor NanoVesta Headboard Bitstream 3/21/2012 BIT 2.5 MB

MachXO2 FPGA Family IBIS Model

  TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] Lattice MachXO2 2.3 4/3/2012 ZIP 9.7 MB

MachXO2 FPGA Family Reference Design

  TITLE NUMBER VERSION DATE FORMAT SIZE
Advanced SDR SDRAM Controller - Design Documentation RD1010 4.7 3/12/2014 PDF 920.7 KB
Advanced SDR SDRAM Controller - Source Code RD1010 4.7 3/12/2014 ZIP 552.4 KB
CompactFlash Controller - Documentation RD1040 1.3 11/8/2010 PDF 531.2 KB
CompactFlash Controller - Source Code RD1040 1.4 11/8/2010 ZIP 1.5 MB
Control Link Serial Interface - Documentation RD1051 1.4 11/8/2010 PDF 250.6 KB
Control Link Serial Interface - Source Code RD1051 1.4 11/8/2010 ZIP 240.7 KB
Fast Page Mode SDRAM Controller - Documentation RD1014 2.3 11/8/2010 PDF 95.3 KB
Fast Page Mode SDRAM Controller - Source Code RD1014 2.3 11/8/2010 ZIP 110.4 KB
I2C Controller for Serial EEPROMs - Documentation RD1006 2.6 3/5/2014 PDF 767.9 KB
I2C Controller for Serial EEPROMs - Source Code RD1006 2.6 3/12/2014 ZIP 751.8 KB
I2C Master with WISHBONE Bus Interface - Documentation RD1046 1.5 3/12/2014 PDF 1.4 MB
I2C Master with WISHBONE Bus Interface - Source Code RD1046 1.5 3/12/2014 ZIP 1.4 MB
I2C Slave Peripheral using Embedded Function Block Reference Design RD1124 2.0 5/1/2012 ZIP 1.5 MB
I2S Controller with WISHBONE Interface Reference Design - Source Code RD1101 1.0 11/8/2010 ZIP 1.6 MB
I2S Controller with WISHBONE Interface Reference Design Documentation RD1101 1.0 11/8/2010 RAR 240.3 KB
LatticeMico8 v3.15 Core Verilog Source Code RD1026 3.15 10/8/2010 ZIP 944.6 KB
LED/OLED Driver RD1103 1.0 11/8/2010 PDF 653.9 KB
LED/OLED Driver - Source code RD1103 1.0 11/8/2010 ZIP 1.3 MB
MachXO2 Display Interface RD1093 1.0 11/1/2010 PDF 496.8 KB
MachXO2 Display Interface - Source code RD1093 1.0 11/8/2010 ZIP 346.4 KB
MachXO2 I2C Embedded Programming Access Firmware RD1129 1.0 5/18/2012 ZIP 3.1 MB
MachXO2 I2C Embedded Programming Access Firmware RD1129 1.0 5/1/2012 PDF 3.3 MB
MachXO2 Soft I2C Slave with Clock Stretching RD1186 1.0 9/15/2013 PDF 1.9 MB
MachXO2 Soft Slave With Clock Stretching RD1186 1.0 10/4/2013 ZIP 1.1 MB
Memory Stick PRO Host Interface RD1109 1.0 4/26/2011 PDF 278.4 KB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge RD1146 1.2 12/12/2013 PDF 4.2 MB
MIPI DSI RX to Parallel Bridge - Documentation RD1185 1.2 12/13/2013 PDF 2 MB
NAND Flash Controller - Source Code RD1055 1.3 11/8/2010 ZIP 583.5 KB
NAND Flash Controller Design - Documentation RD1055 1.2 11/1/2010 PDF 613.9 KB
NOR Flash Memory Controller with WISHBONE Interface - Documentation RD1087 1.1 11/8/2010 PDF 254.5 KB
NOR Flash Memory Controller with WISHBONE Interface - Source Code RD1087 1.1 11/8/2010 ZIP 198.1 KB
Parallel to MIPI CSI-2 TX Bridge - Documentation RD1183 1.2 12/13/2013 PDF 1.2 MB
Parallel to MIPI DSI TX Bridge - Documentation RD1184 1.2 12/13/2013 PDF 1.6 MB
Power Management Bus Reference Design - Source Code RD1100 1.1 12/23/2011 ZIP 378.3 KB
Power Management Bus Reference Design Documentation RD1100 1.1 12/23/2011 PDF 481 KB
PWM Fan Controller RD1060 1.4 12/23/2010 PDF 138.8 KB
PWM Fan Controller - Source Code RD1060 1.4 12/23/2010 ZIP 104.6 KB
RAM-Type Interface for Embedded User Flash Memory Reference Design RD1126 1.2 7/2/2012 ZIP 2.2 MB
Read and Write Usercode - Documentation RD1041 1.2 4/18/2011 PDF 438.2 KB
SD Flash Controller Using SD Bus - Documentation RD1048 1.4 3/12/2014 PDF 1.7 MB
SD Flash Controller Using SD Bus - Source Code RD1088 1.4 3/12/2014 ZIP 5 MB
Simple Sigma-Delta ADC, Documentation RD1066 1.3 11/8/2010 PDF 150.6 KB
Simple Sigma-Delta ADC, Source Code RD1066 1.3 11/8/2010 ZIP 124.4 KB
Single-Wire Controller for Digital Temp Sensors Reference Design - Source Code RD1099 1.0 11/8/2010 ZIP 513.1 KB
Single-Wire Controller for Digital Temp. Sensors Reference Design Documentation RD1099 1.0 11/8/2010 PDF 574.4 KB
SMBus Controller Reference Design Documentation RD1098 1.0 11/8/2010 PDF 2.4 MB
SMBus Controller Reference Design Source Code RD1098 1.0 11/8/2010 ZIP 2.2 MB
SPI (Serial Peripheral Interface) WISHBONE Controller - Source Code RD1044 1.5 3/4/2011 ZIP 234.3 KB
SPI Flash Controller with Wear Leveling RD1102 1.0 11/8/2010 PDF 1 MB
SPI Flash Controller with Wear Leveling - Source code RD1102 1.0 11/8/2010 ZIP 952.2 KB
SPI Slave Peripheral Using the Embedded Function Block Reference Design RD1125 1.1 5/1/2012 ZIP 677.4 KB
SPI WISHBONE Controller - Documentation RD1044 01.5 3/3/2011 PDF 287.3 KB
WISHBONE UART - Documentation RD1042 1.3 11/8/2010 PDF 733.4 KB
WISHBONE UART - Source Code RD1042 1.3 11/8/2010 ZIP 736.6 KB
WISHBONE-Compatible LCD Controller - Documentation RD1053 1.2 11/8/2010 PDF 165.4 KB
WISHBONE-Compatible LCD Controller - Source Code RD1053 1.2 11/8/2010 ZIP 140.9 KB

Lattice is dedicated to providing excellent customer support, from live training courses, to online videos, design services and more. Click the links below for further information.

Visit the Answer Database
We've collected the most frequently asked questions about Lattice products and answered them here.

Attend a Training Course
Learn about online and live training events to help you get the most out of your Lattice products.

Connect with Design Services
Lattice and selected partners are available to provide custom design, support and consultation services.

Contact Technical Support
Receive direct support from the Lattice Applications team via phone, e-mail or online. Click here for full contact information.

 

Buy Online

Use the interactive map to find a list of authorized distributors, sales representatives, and sales offices nearest to you.

About Lattice Semiconductor

Lattice Semiconductor (NASDAQ: LSCC) is the World’s leading provider of ultra-low-power programmable IC solutions for makers of smartphones, mobile handheld devices, small-cell networking equipment, industrial control, automotive infotainment, and much more. With more than 1 billion units sold over the past 10 years, Lattice ships more FPGAs, CPLDs and Power Management solutions than any other programmable solutions vendor. For more information, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS.

Search Support