MachXO2 – Flexible Interface Bridging FPGA

Bridging and I/O expansion versatility. Rapid hardware acceleration for improved signal control.

Related Products


MachXO3

Take Control and Power-Up – With boot-up times faster than 1ms, the MachXO2 can rapidly take control of signals during power-up for increased system performance and reliable operation.

Increase System Performance, Logically – With in-built hardware acceleration and up to 6864 LUT4s, the MachXO2 enables you to reduce processor workload and increase system performance.

More Voltages, More Savings – With 3.3/2.5 V and 1.2 V versions and standby power as low as 22 μW, you can choose to operate the MachXO2 from a convenient power supply that is available early during system power-up.

Features

  • Up to 256 kbits of user Flash memory and up to 240 kbits sysMEM™ embedded block RAM
  • Up to 334 hot-socketable IOs that avoid excess leakage
  • Programmable through JTAG, SPI, I2C or Wishbone
  • TransFR feature allows in-field design update without interrupting equipment operation
  • Programmable sysIO™ buffer supports LVCMOS, LVTTL, PCI, LVDS, BLVDS, MLVDS, RSDS, LVPECL, SSTL, HSTL and more

Jump to

Family Table

MachXO2 Device Selection Guide

  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
Density LUTs 256 640 640 1280 1280 2112 2112 4320 6864
EBR RAM Blocks (9 kbits/block) 0 2 7 7 8 8 10 10 26
EBR SRAM (kbits) 0 18 64 64 74 74 92 92 240
Dist. SRAM (kbits) 2 5 5 10 10 16 16 34 54
User Flash Memory (kbits) 0 24 64 64 80 80 96 96 256
PLL 0 0 1 1 1 1 2 2 2
DDR/DDR2/LPDDR Memory Support - - Yes Yes Yes Yes Yes Yes Yes
Configuration Memory Internal Flash
Dual Boot1 Yes Yes Yes Yes Yes Yes Yes Yes Yes
Embedded Function Blocks I2C (2), SPI (1), Timer (1)
Core Vcc 1.2 V ZE ZE - ZE - ZE & HE HE ZE & HE ZE & HE
Core Vcc 2.5 - 3.3 V HC HC HC HC HC HC HC HC HC
Temp C Yes Yes Yes Yes Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes Yes Yes Yes Yes
0.4 mm Spacing I/O Count
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
25-ball WLCSP (2.5 x 2.5 mm)


18




36-ball WLCSP (2.5 x 2.5 mm)


28




49-ball WLCSP (3.2 x 3.2 mm)




38


64-ball ucBGA (4 x 4 mm) 44







81-ball WLCSP (3.8 x 3.8 mm)






63
0.5 mm Spacing I/O Count
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
32-pin QFN (5 x 5 mm) 21

21




48-pin QFN (7 x 7 mm) 40 40






84-pin QFN (7 x 7 mm)






683
132-ball csBGA (8 x 8 mm) 55 79
104
104
104
184-ball csBGA (8 x 8 mm)2






150
100-pin TQFP (14 x 14 mm) 55 78
79
79


144-pin TQFP (20 x 20 mm)

107 107
111
114 114
0.8 mm Spacing I/O Count
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
256-ball caBGA (14 x 14 mm)




206
206 206
332-ball caBGA (17 x 17 mm)






274 278
1.0 mm Spacing I/O Count
  XO2-256 XO2-640 XO2-640U XO2-1200 XO2-1200U XO2-2000 XO2-2000U XO2-4000 XO2-7000
256-ball ftBGA (17 x 17 mm)



206 206
206 206
484-ball fpBGA (23 x 23 mm)





278 278 334

1. Dual Boot supported with external boot Flash
2. Available with HE option only
3. Available with HC & ZE options only

Example Solutions

Interface_expansionExpand Image

Microprocessor Interface Expansion

  • Save cost by adding GPIO to low-cost microcontrollers
  • Add additional SPI and I2C interfaces to system control processors
  • Quickly add high-performance DDR SRAM and Flash memory interfaces
  • Simplify system management with PLD implementation of system status registers
Timing_offloadExpand Image

Timing Offload for Improved Performance of Real-Time Functions

  • Precisely control signals during system power-up with instant-on logic
  • Implement PWM functions to precisely generate analog voltages for lighting and motor control
  • Build sensor buffers and smart interrupts to ensure real world events are captured
  • Use hardware UARTs to overcome performance limitations of software implementations
HW_accelerationExpand Image

Increase System Performance through Hardware Acceleration

  • Reduce processor workload with logic-based signal filtering
  • Rotate, scale and combine images with minimal processor overhead
IO_expansionExpand Image

Select the Ideal Components for Your Design Using Flexible Interface Bridging

  • Bridge low-cost microcontrollers to common display interfaces such as RGB and 7:1 LVDS
  • Optimize performance and cost by interfacing HiSPi, LVDS or parallel RGB image sensors to almost any processor
  • Maximize component selection flexibility by bridging between voltage domains and interfaces such as SPI, I2C, SDIO, PCI and LPC

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Family Data Sheet
FPGA-DS-02056 3.6 12/17/2020 PDF 3 MB
MachXO2 Family Data Sheet Supplement for LVCMOS10 Inputs and BIDIs
FPGA-DS-02062 1.2 1/22/2021 PDF 528.2 KB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019 PDF 1.7 MB
MachXO2 Hardware Checklist
FPGA-TN-02154 1.8 7/24/2020 PDF 691 KB
MachXO2 sysIO Usage Guide
FPGA-TN-02158 2.2 1/31/2021 PDF 1.1 MB
Memory Usage Guide for MachXO2 Devices
FPGA-TN-02159 1.4 7/24/2020 PDF 4.7 MB
Implementing High-Speed Interfaces with MachXO2 Devices
FPGA-TN-02153 1.8 4/7/2020 PDF 2.3 MB
MachXO2 SED Usage Guide
FPGA-TN-02156 2.1 1/29/2021 PDF 709.4 KB
MachXO2 Programming and Configuration Usage Guide
FPGA-TN-02155 4.1 2/17/2021 PDF 1.5 MB
MachXO2 sysCLOCK PLL Design and Usage Guide
FPGA-TN-02157 2.8 7/24/2020 PDF 1.7 MB
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.2 12/7/2020 PDF 770.7 KB
Using TraceID
FPGA-TN-02084 2.1 10/12/2020 PDF 976.1 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.4 12/7/2020 PDF 4.7 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices
FPGA-TN-02162 4.7 3/26/2020 PDF 1.9 MB
Power Decoupling and Bypass Filtering for Programmable Devices
TN1068 1.0 5/1/2004 PDF 31.4 KB
Wafer-Level Chip-Scale Package Guide
TN1242 1.0 7/13/2011 PDF 127.2 KB
Power Estimation and Management for MachXO2 Devices
TN1198 1.5 6/19/2015 PDF 1.2 MB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
Thermal Management
FPGA-TN-02044 3.7 2/18/2021 PDF 1.3 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide
TN1246 2.4 11/30/2016 PDF 6.2 MB
Designing for Migration from MachXO2-1200-R1 to Standard (Non-R1) Devices
FPGA-AN-02012 1.3 1/22/2021 PDF 686.9 KB
PCB Layout Recommendations for Leaded Packages
FPGA-TN-02160 1.4 1/31/2021 PDF 979.6 KB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-02011 1.2 10/11/2019 PDF 2.1 MB
MachXO2-1200 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		FPGA-SC-02009 1.44 11/16/2020 CSV 8.4 KB
MachXO2 48-Pin QFN Package Migration File
1.4 7/1/2016 CSV 3.3 KB
MachXO2 484-Pin fpBGA Package Migration File
1.3 3/23/2012 CSV 39.8 KB
MachXO2 332-Pin caBGA Package Migration File
1.3 3/23/2012 CSV 20.4 KB
MachXO2 100-Pin TQFP Package Migration File
1.4 3/23/2012 CSV 12 KB
MachXO2-640 Pinout
Note: a pinout file can be exported from Diamond version 1.4 or above. 		1.3 8/4/2016 CSV 6.1 KB
MachXO2-1200U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above 		1.1 3/23/2012 CSV 13.1 KB
MachXO2-640U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.1 3/23/2012 CSV 6 KB
MachXO2 132-Pin csBGA Package Migration File
1.4 3/23/2012 CSV 19.4 KB
MachXO2-7000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.1 3/23/2012 CSV 30.4 KB
MachXO2-2000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.2 2/14/2014 CSV 18.3 KB
MachXO2 144-Pin TQFP Package Migration File
1.3 3/23/2012 CSV 22.3 KB
MachXO2 256-Pin caBGA Package Migration File
1.3 3/23/2012 CSV 23.9 KB
MachXO2-256 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.3 8/4/2016 CSV 6.5 KB
MachXO2 256-Pin ftBGA Package Migration File
1.3 3/23/2012 CSV 31.3 KB
MachXO2-4000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.45 11/16/2020 CSV 37.6 KB
MachXO2 32-Pin QFN Package Migration File
1.41 4/8/2015 CSV 2.2 KB
MachXO2-2000U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.1 3/23/2012 CSV 30.5 KB
Package Diagrams
FPGA-DS-02053 6.2 3/24/2021 PDF 8.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Family Data Sheet
FPGA-DS-02056 3.6 12/17/2020 PDF 3 MB
MachXO2 Family Data Sheet Supplement for LVCMOS10 Inputs and BIDIs
FPGA-DS-02062 1.2 1/22/2021 PDF 528.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Single Event Upset (SEU) Report for MachXO2, MachXO3, and MachXO3D
FPGA-TN-02146 1.0 12/31/2019 PDF 752.1 KB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019 PDF 1.7 MB
MachXO2 sysCLOCK PLL Design and Usage Guide (Japanese Language Version)
TN1199J 2.5 6/1/2014 PDF 2.1 MB
MachXO2 Hardware Checklist
FPGA-TN-02154 1.8 7/24/2020 PDF 691 KB
MachXO2 sysIO Usage Guide
FPGA-TN-02158 2.2 1/31/2021 PDF 1.1 MB
Implementing High-Speed Interfaces with MachXO2 Devices (Japanese)
TN1203J 1.7 1/1/2014 PDF 2.9 MB
Memory Usage Guide for MachXO2 Devices
FPGA-TN-02159 1.4 7/24/2020 PDF 4.7 MB
MachXO2 SED Usage Guide (Japanese Language Version)
TN1206J 1.9 12/1/2013 PDF 349.1 KB
Implementing High-Speed Interfaces with MachXO2 Devices
FPGA-TN-02153 1.8 4/7/2020 PDF 2.3 MB
MachXO2 Programming and Configuration Usage Guide (Japanese Language Version)
TN1204J 3.6 4/1/2015 PDF 2.9 MB
MachXO2 SED Usage Guide
FPGA-TN-02156 2.1 1/29/2021 PDF 709.4 KB
MachXO2 Programming and Configuration Usage Guide
FPGA-TN-02155 4.1 2/17/2021 PDF 1.5 MB
Memory Usage Guide for MachXO2 Devices (Japanese Language Version)
TN1201J 1.3 7/1/2013 PDF 2.2 MB
MachXO2 sysIO Usage Guide (Japanese Language Version)
TN1202J 2.0 5/1/2015 PDF 1.4 MB
MachXO2 sysCLOCK PLL Design and Usage Guide
FPGA-TN-02157 2.8 7/24/2020 PDF 1.7 MB
Power Estimation and Management for MachXO2 Devices (Japanese Language Version)
TN1198J 1.3 12/26/2012 PDF 548.6 KB
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.2 12/7/2020 PDF 770.7 KB
Using TraceID
FPGA-TN-02084 2.1 10/12/2020 PDF 976.1 KB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices (Japanese Language Version)
TN1205J 4.4 9/1/2014 PDF 1.3 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.4 12/7/2020 PDF 4.7 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices
FPGA-TN-02162 4.7 3/26/2020 PDF 1.9 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide (Japanese Language Version)
TN1246J 2.1 2/1/2015 PDF 3.1 MB
Power Decoupling and Bypass Filtering for Programmable Devices
TN1068 1.0 5/1/2004 PDF 31.4 KB
Wafer-Level Chip-Scale Package Guide
TN1242 1.0 7/13/2011 PDF 127.2 KB
Power Estimation and Management for MachXO2 Devices
TN1198 1.5 6/19/2015 PDF 1.2 MB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
Thermal Management
FPGA-TN-02044 3.7 2/18/2021 PDF 1.3 MB
Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide
TN1246 2.4 11/30/2016 PDF 6.2 MB
Designing for Migration from MachXO2-1200-R1 to Standard (Non-R1) Devices
FPGA-AN-02012 1.3 1/22/2021 PDF 686.9 KB
PCB Layout Recommendations for Leaded Packages
FPGA-TN-02160 1.4 1/31/2021 PDF 979.6 KB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-02011 1.2 10/11/2019 PDF 2.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2-1200 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		FPGA-SC-02009 1.44 11/16/2020 CSV 8.4 KB
MachXO2 48-Pin QFN Package Migration File
1.4 7/1/2016 CSV 3.3 KB
MachXO2 484-Pin fpBGA Package Migration File
1.3 3/23/2012 CSV 39.8 KB
MachXO2 332-Pin caBGA Package Migration File
1.3 3/23/2012 CSV 20.4 KB
MachXO2 100-Pin TQFP Package Migration File
1.4 3/23/2012 CSV 12 KB
MachXO2-640 Pinout
Note: a pinout file can be exported from Diamond version 1.4 or above. 		1.3 8/4/2016 CSV 6.1 KB
MachXO2-1200U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above 		1.1 3/23/2012 CSV 13.1 KB
MachXO2-640U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.1 3/23/2012 CSV 6 KB
MachXO2 132-Pin csBGA Package Migration File
1.4 3/23/2012 CSV 19.4 KB
MachXO2-7000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.1 3/23/2012 CSV 30.4 KB
MachXO2-2000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.2 2/14/2014 CSV 18.3 KB
MachXO2 144-Pin TQFP Package Migration File
1.3 3/23/2012 CSV 22.3 KB
MachXO2 256-Pin caBGA Package Migration File
1.3 3/23/2012 CSV 23.9 KB
MachXO2-256 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.3 8/4/2016 CSV 6.5 KB
MachXO2 256-Pin ftBGA Package Migration File
1.3 3/23/2012 CSV 31.3 KB
MachXO2-4000 Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.45 11/16/2020 CSV 37.6 KB
MachXO2 32-Pin QFN Package Migration File
1.41 4/8/2015 CSV 2.2 KB
MachXO2-2000U Pinout
Note: a pinout file can be exported from Diamond version 1.3 or above. 		1.1 3/23/2012 CSV 30.5 KB
Package Diagrams
FPGA-DS-02053 6.2 3/24/2021 PDF 8.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Programming Via WISHBONE Interface User's Guide
UG57 1.0 5/1/2012 PDF 1.3 MB
MachXO2 Low Power Control Demo User's Guide
UG58 1.0 5/1/2012 PDF 1.2 MB
MachXO2 Master SPI/I2C Demo Using C User's Guide
UG54 1.1 3/1/2015 PDF 2.7 MB
MachXO2 Hardened SPI Master/Slave Demo
UG56 01.1 5/24/2012 PDF 682.1 KB
PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2 		IPUG18 9.2 11/8/2010 PDF 4.6 MB
MachXO2 Hardened I2C Master/Slave Demo User's Guide
UG55 1.0 5/1/2012 PDF 1.4 MB
DDR2 SDRAM IP Core User's Guide
IPUG105 01.0 9/10/2012 PDF 3.5 MB
Display Interface Multiplexer User's Guide
ipug95 1.0 11/8/2010 PDF 983.2 KB
DDR & DDR2 SDRAM Controller- Pipelined (MachXO2) IP Core User's Guide
ipug93 1.2 3/20/2015 PDF 3.5 MB
LPDDR3 SDRAM Controller IP Core User's Guide
IPUG110 1.0 9/23/2014 PDF 3 MB
LPDDR SDRAM Controller IP Core User's Guide
IPUG92 1.3 2/1/2014 PDF 2.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
WISHBONE UART - Source Code
RD1042 1.6 12/1/2014 ZIP 58.5 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation
FPGA-RD-02131 1.6 1/31/2021 PDF 1.4 MB
LatticeMico8 v3.15 Core Verilog Source Code
RD1026 3.15 10/8/2010 ZIP 944.6 KB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge
RD1146 1.4 12/28/2016 ZIP 4.3 MB
LED/OLED Driver - Source code
RD1103 1.1 3/1/2014 ZIP 1.4 MB
MachXO2, MachXO3 and ECP5 7:1 LVDS Video Interface - Source code
RD1093 1.4 9/17/2015 ZIP 1.9 MB
MachXO2 Soft I2C Slave with Clock Stretching - Documentation
FPGA-RD-02092 1.2 1/22/2021 PDF 1.1 MB
MachXO2, MachXO3 and ECP5 7:1 LVDS Video Interface - Documentation
FPGA-RD-02093 1.5 1/22/2021 PDF 1.2 MB
LED/OLED Driver - Documentation
RD1103 1.1 3/1/2014 PDF 989.6 KB
Memory Stick PRO Host Interface
FPGA-RD-02094 1.1 1/22/2021 PDF 1.2 MB
MachXO2 I2C Embedded Programming Access Firmware
RD1129 1.1 1/18/2015 ZIP 3.1 MB
MachXO2 Soft I2C Slave With Clock Stretching - Source Code
RD1186 1.2 11/28/2014 ZIP 1.2 MB
I2C to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-02190 1.0 5/16/2020 PDF 1.5 MB
I2C to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-02190 1.0 5/16/2020 ZIP 1.3 MB
MachXO2 I2C Embedded Programming Access Firmware User's Guide
FPGA-RD-02091 1.2 1/22/2021 PDF 1.8 MB
RAM-Type Interface for Embedded User Flash Memory Reference Design – Documentation
FPGA-RD-02098 1.2 1/22/2021 PDF 1.5 MB
Parallel to MIPI DSI TX Bridge - Source Code
RD1184 1.5 1/1/2015 ZIP 2.6 MB
Advanced SDR SDRAM Controller - Design Documentation
FPGA-RD-02087 4.9 1/22/2021 PDF 1.1 MB
CompactFlash Controller - Documentation
FPGA-RD-02088 1.4 1/22/2021 PDF 1.7 MB
Advanced SDR SDRAM Controller - Source Code
RD1010 4.8 9/12/2014 ZIP 495.7 KB
Control Link Serial Interface - Documentation
FPGA-RD-02089 1.5 1/22/2021 PDF 810.2 KB
CompactFlash Controller - Source Code
RD1040 1.4 11/8/2010 ZIP 1.5 MB
Control Link Serial Interface - Source Code
RD1051 1.4 11/8/2010 ZIP 240.7 KB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD1183 1.5 1/1/2015 ZIP 1.2 MB
SPI to WISHBONE Configuration Interface Bridge - Source Code
FPGA-RD-02191 1.0 5/16/2020 ZIP 1.3 MB
SPI to WISHBONE Configuration Interface Bridge - Documentation
FPGA-RD-02191 1.0 5/16/2020 PDF 1.6 MB
Simple Sigma-Delta ADC, Documentation
FPGA-RD-02047 1.6 1/30/2020 PDF 971 KB
WISHBONE UART - Documentation
FPGA-RD-02137 1.7 2/5/2021 PDF 1.1 MB
SPI Slave Peripheral Using the Embedded Function Block
RD1125 1.3 1/1/2015 PDF 1.2 MB
SPI Flash Controller with Wear Leveling
FPGA-RD-02101 1.1 1/29/2021 PDF 1 MB
SPI WISHBONE Controller - Documentation
RD1044 1.7 3/1/2014 PDF 960 KB
SMBus Controller Reference Design - Documentation
FPGA-RD-02100 1.1 1/22/2021 PDF 1.3 MB
SMBus Controller Reference Design Source Code
RD1098 1.0 11/8/2010 ZIP 2.2 MB
SPI Flash Controller with Wear Leveling - Source code
RD1102 1.0 11/8/2010 ZIP 952.2 KB
SD Flash Controller Using SD Bus - Documentation
RD1088 1.4 3/12/2014 PDF 1.4 MB
Simple Sigma-Delta ADC - Source Code
1.5 9/26/2018 ZIP 1.5 MB
WISHBONE-Compatible LCD Controller - Documentation
FPGA-RD-02102 1.3 1/29/2021 PDF 918.3 KB
WISHBONE-Compatible LCD Controller - Source Code
RD1053 1.2 11/8/2010 ZIP 140.9 KB
Single-Wire Controller for Digital Temp. Sensors Reference Design - Documentation
FPGA-RD-02099 1.1 1/22/2021 PDF 1.1 MB
SPI Slave Peripheral Using the Embedded Function Block Reference Design
RD1125 1.3 1/1/2015 ZIP 730.6 KB
SPI WISHBONE Controller - Source Code
RD1044 1.8 1/12/2015 ZIP 477.7 KB
Single-Wire Controller for Digital Temp Sensors Reference Design - Source Code
RD1099 1.0 11/8/2010 ZIP 513.1 KB
SD Flash Controller Using SD Bus - Source Code
RD1088 1.4 3/12/2014 ZIP 5 MB
PWM Fan Controller - Source Code
RD1060 1.7 1/16/2015 ZIP 2.9 MB
Parallel to MIPI DSI TX Bridge - Documentation
FPGA-RD-02133 1.6 1/31/2021 PDF 1.2 MB
RAM-Type Interface for Embedded User Flash Memory Reference Design – Source Code
RD1126 1.4 10/2/2014 ZIP 2.1 MB
NOR Flash Memory Controller with WISHBONE Interface - Documentation
FPGA-RD-02096 1.2 1/22/2021 PDF 1.6 MB
Power Management Bus Reference Design Documentation
FPGA-RD-02097 1.2 1/22/2021 PDF 1.1 MB
Read and Write Usercode - Source Code
RD1041 1.3 3/1/2014 ZIP 618.2 KB
NAND Flash Controller Design - Documentation
FPGA-RD-02095 1.3 1/22/2021 PDF 1.6 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation
RD1183 1.5 1/1/2015 PDF 1.3 MB
NAND Flash Controller - Source Code
RD1055 1.4 11/8/2014 ZIP 912.7 KB
Power Management Bus Reference Design - Source Code
RD1100 1.1 12/23/2011 ZIP 378.3 KB
NOR Flash Memory Controller with WISHBONE Interface - Source Code
RD1087 1.1 11/8/2010 ZIP 198.1 KB
Read and Write Usercode - Documentation
RD1041 1.4 9/17/2014 PDF 831.5 KB
PWM Fan Controller
RD1060 1.6 9/10/2014 PDF 481.5 KB
I2S Controller with WISHBONE Interface Reference Design - Source Code
RD1101 1.1 3/1/2014 ZIP 1.6 MB
Fast Page Mode SDRAM Controller - Documentation
FPGA-RD-02090 2.4 1/22/2021 PDF 887.1 KB
Fast Page Mode SDRAM Controller - Source Code
RD1014 2.3 11/8/2010 ZIP 110.4 KB
I2C Slave Peripheral using Embedded Function Block - Documentation
RD1124 1.3 10/1/2014 PDF 2 MB
I2C Slave Peripheral using Embedded Function Block Reference Design
RD1124 1.3 10/1/2014 ZIP 1.4 MB
I2C Master with WISHBONE Bus Interface - Source Code
RD1046 1.8 2/1/2016 ZIP 1.4 MB
I2C Controller for Serial EEPROMs - Documentation
RD1006 2.6 3/5/2014 PDF 767.9 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD1005 5.9 1/10/2015 ZIP 809.7 KB
I2C Controller for Serial EEPROMs - Source Code
RD1006 2.7 1/12/2015 ZIP 613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation
RD1046 1.6 1/15/2015 PDF 1.4 MB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD1005 5.8 3/6/2014 PDF 987.4 KB
I2S Controller with WISHBONE Interface Reference Design Documentation
RD1101 1.1 3/1/2014 PDF 2.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
I2C Read-back Failure Mode on Specific Use Scenario in MachXO2 and MachXO3 Products and Work-Around Solutions Product Bulletin
PB1412 1.1 3/4/2015 PDF 179.4 KB
MachXO2/MachXO3/LPTM21 WISHBONE Flash Corruption Avoidance
PB1381 1.1 1/3/2017 PDF 88.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
PCN09A-19 BOM comparison final
2.0 1/8/2020 XLSX 24.8 KB
Standard OPNs for ASEK PCN09A-19
2.0 1/8/2020 XLSX 24.4 KB
PCN09A-19 Consolidation Qual External Changes
1/9/2020 PDF 326.2 KB
PCN09A-19 ASEK Second Source Qualification for Selected Products
1/9/2020 PDF 359 KB
PCN 09A-12 Affected Devices
Assembly Site 		PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-12 1.0 5/14/2012 PDF 160.2 KB
PCN07A-12 Notification of Intent to Utilize an Alternate Qualified Mask Set for the Lattice MachXO2 256ZE Devices
Mask Set 		PCN07A-12 1.0 3/19/2012 PDF 106.6 KB
PCN 09A-12 Material Set Changes
Assembly Site 		PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN06B-12 Notification of Changes to the MachXO2 Family Datasheet
Data Sheet 		PCN06B-12 1.0 4/16/2012 PDF 211.8 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-12 1.0 5/11/2012 PDF 178.9 KB
PCN03A-14 Characterization Report
PCN03A-14 1.0 4/4/2014 PDF 919.5 KB
PCN06A-14 Affected Device List
PCN06A-14 1.0 10/3/2014 XLSX 45.1 KB
PCN06A-14 Material Set Table
PCN06A-14 1.0 10/3/2014 XLSX 13.7 KB
PCN06A-14 Characterization Report
PCN06A-14 1.0 10/3/2014 PDF 563.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-14 1.0 11/21/2014 PDF 229.5 KB
PCN03A-14 FAQ
PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Material Set Table
PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03A-14 Affected Part Number List
PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-14 1.0 11/21/2014 PDF 229.9 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set 		PCN06C-11 1.0 8/1/2011 PDF 838.5 KB
PCN10A-11 Notification of Intent to Freeze ispLEVER After Version 8.2
Conversion 		PCN10A-11 1.0 7/25/2011 PDF 52.7 KB
PCN09A-11 Notification of Intent to Transition from the MachXO2-1200 R1 to the Standard MachXO2-1200 Ordering Part Number
Conversion, Discontinuance 		PCN09A-11 1.0 7/18/2011 PDF 56.2 KB
ACN03D-11 Withdrawal of ACN03C-11
Material Set 		ANC03D-11 1 4/1/2011 PDF 796.6 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set 		PCN07C-11 1.0 8/1/2011 PDF 917.9 KB
PCN03A-13 Device Characterization Report
PCN03A-13 6/28/2013 PDF 981.3 KB
PCN10A13_AffectedPartNumbers
PCN10A-13 1 9/26/2013 XLSX 33 KB
PCN 10A-13 Notification of Changes to the MachXO2 Family Data Sheet
Data Sheet 		PCN10A-13 1.0 9/30/2013 PDF 119.9 KB
PCN 03B13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set 		PCN03B 1.0 11/14/2014 PDF 229.6 KB
PCN03A-13 FAQs
PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03B-13 Affected Part Number and Material Sets
PCN03B-13 6/28/2013 XLSX 69 KB
PCN08A13_AffectedDevices
Other 		PCN08A-13 1 9/26/2013 XLSX 78.2 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-13 6/28/2013 PDF 202.5 KB
PCN 07B-16 ATT AQMS-Assembly-Test XO2-1200 WLCSP
6/13/2016 PDF 435.6 KB
PCN 03A-16 MachXO2/XO3 Datasheet Change
Data Sheet 		1.1 3/22/2016 PDF 367.7 KB
Power Calculator Update for All XO2 and Derivative (XO2/XO3L/XO3LF/XO3D/PlatformManager2) Devices
PCN02A-20 1.1 1/14/2021 PDF 28.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		7.0 2/1/2021 ZIP 3.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Ultra Low Density FPGAs Brochure (Japanese)
I0229J 1.0 1/1/0001 PDF 2.2 MB
MachXO2 WLCSP Packaging News Brief
NB105 9/26/2011 PDF 517.1 KB
MachXO2 Product Brief
I0221 1.0 4/4/2012 PDF 8 MB
MIPI Display Serial Interface Solution Product Flyer
I0241 2.0 10/22/2013 PDF 1.8 MB
Product Selector Guide
I0211 29.0 4/14/2021 PDF 8.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2 Product Family Qualification Summary
Rev M 8/10/2020 PDF 1013 KB
MG132
Rev P 11/3/2020 PDF 49.6 KB
32 QFNS Pb-Free Device Material Content
Includes all 3 versions 		D 4/19/2016 PDF 51.1 KB
TN144_LA
Rev C 4/25/2018 PDF 22.1 KB
TN_TG_TQ144 Cu_wire all
Rev E 7/24/2018 PDF 50.8 KB
QN84
Rev F 7/29/2019 PDF 31.3 KB
BG256_XO3
Rev. O 11/5/2020 PDF 33.1 KB
SN_SG32
Rev G 9/10/2020 PDF 87.3 KB
BG332
Rev G 11/3/2020 PDF 46.3 KB
SWG_UWG25
Rev B 4/19/2018 PDF 40.6 KB
UWG49_XO2_XO3
Rev F1 6/25/2020 PDF 27.8 KB
TN_TG100 Cu_wire all
Rev D1 8/22/2018 PDF 37.3 KB
FG484_MachXO2
Rev K 11/11/2020 PDF 32.3 KB
BG256_XO2
Rev O 11/5/2020 PDF 33.1 KB
SN_SG48
Rev C1 9/20/2019 PDF 52.9 KB
MG184_XO2
Rev G 11/23/2020 PDF 51 KB
FTG256_v3_XO2
Rev Q 10/28/2020 PDF 37.7 KB
UMG64_XO2
Rev R 11/25/2020 PDF 30.4 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Distributed PLD Solution for Reduced Server Cost and Increases Flexibility
WP009 1.0 8/1/2017 PDF 708.1 KB
Creating An ADC Using FPGA Resources
1.0 3/1/2010 PDF 272.2 KB
Expanding Microprocessor Connectivity Using Low-cost FPGAs
1.0 8/28/2013 PDF 474.4 KB
Dual Sensor Design Solution - White Paper (Chinese Language Version)
1.0 5/31/2012 PDF 236.6 KB
Revolutionary Hardware Management Solutions
WP0003 4.0 5/9/2018 PDF 1.4 MB
New Approaches to Hardware Acceleration Using Ultra Low Density FPGAs
1.0 8/25/2013 PDF 397 KB
Reducing Cost and Power in Consumer Applications Using PLDs
1.0 11/8/2010 PDF 354.4 KB
Using Low Cost, Non-Volatile PLDs in System Applications
2.0 8/30/2013 PDF 435.3 KB
Reducing Cost and Power in Consumer Applications Using PLDs (Traditional Chinese Language)
1.0 3/28/2011 PDF 785.2 KB
Using Low Cost, Non-Volatile PLDs in System Applications (Chinese Language)
1.0 11/1/2010 PDF 246.2 KB
Solving Today's Interface Challenges With Ultra-Low-Density FPGA Bridging Solutions
1.0 8/8/2013 PDF 341.4 KB
Reducing Cost and Power in Consumer Applications Using PLDs (Chinese Language)
1.0 11/1/2010 PDF 496.4 KB
The Challenges of Automotive Vision Systems Design
4/1/2007 PDF 341.5 KB
Managing Image Data in Automotive Infotainment Applications Using Low Cost PLDs (Chinese Language)
1.0 8/1/2011 PDF 431.8 KB
Multi-time Programmable ULD FPGAs
1.0 12/1/2013 PDF 163.5 KB
Leveraging MIPI D-PHY-based Peripherals in Embedded Designs
1.0 5/1/2014 PDF 567.3 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages (Chinese Language)
1.0 7/1/2010 PDF 488.5 KB
Low Cost Board Layout Techniques for Designing with PLDs in BGA Packages
1.0