LatticeECP3 AMC Evaluation Board

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The LatticeECP3 AMC Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers in an advanced mezanine card (AMC) system environment. The features of the LatticeECP3 AMC Evaluation Board assist engineers with rapid prototyping and testing of their designs. The board follows portions of the PICMG AMC R2.0 AMC form-factor specification that allows users the capability to use the board in live system evaluations.

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Features

  • Single module AMC PCB card edge interface
    • Allows demonstration of AMC Fat Pipes
    • Common options interface
  • Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra)
  • DMC (FPGA Mezzanine Card) expansion connector
  • USB-B connection to UART for run-time control
  • RJ45 interface to 10/100/1000 Ethernet to SGMII
  • SFP transceiver module cage and connection
  • On-board Boot Flash
    • 64M Serial SPI Flash
  • DDR2 memory components (256MB x 32 bits)
  • 32-bit parallel, non-volatile memory that can be read, erased and reprogrammed
  • Switches, LEDs and displays for demonstration purposes
  • ispVM™ System software programming support
  • On-board reference clock sources

The board can be used as provided with a front-panel SFP cage that accepts industry standard transceiver modules. It also includes a RJ45 network jack for Ethernet communication. However, by removing the SFP and RJ45 the board can be used with a standard VITA 57.1 FPGA Mezzanine Card. This permits user-specific FMCs to be used with the LatticeECP3 AMC Evaluation Board.

Board Photos

Top and Bottom View With Details

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Ordering Information

  • Reference Number: LFE3-150EA-AMC-EVN
  • This board is no longer available for purchase.
  • Information provided on this page is for reference purposes only.
  • Contact your local Lattice sales representative for further information.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010 PDF 176.4 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010 PDF 176.4 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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LatticeECP3 AMC Serial RapidIO 2.1 Demo User's Guide
UG39 01.0 11/17/2010 PDF 2.7 MB
LatticeECP3 AMC Evaluation Board User's Guide
EB56 01.1 8/27/2012 PDF 6.6 MB
Programming Cable - User Guide
Describes the features and recommended usage guidelines of Lattice ispDOWNLOAD Cables.
FPGA-UG-02042 26.7 4/24/2024 PDF 992.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Wireless Solutions Brochure
I0197 3.0 8/14/2012 PDF 2 MB
Lattice HetNet Solutions Brochure
I0234 1.0 11/12/2013 PDF 2.2 MB
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GEN2 Serial RapidIO and Low Cost, Low Power FPGAs
1.0 8/4/2011 PDF 276 KB

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