Rapid development and performance evaluation – Allows interfacing between CrossLink and high speed video interfaces as well as lower speed peripheral control.
Demonstrate video interfacing – Each SMA I/O Link board contains 10 SMAs for connectivity to source synchronous interfaces with 4 data lanes and 1 clock lane.
Enable peripheral controls – Interface to low-speed peripherals of image sensors and displays such as I2C and SPI. Develop general purpose I/O for clock distribution, sensor triggering and power sequencing.