Cyclic Redundancy Check

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Reference Design LogoThe Cyclic Redundancy Check (CRC) is an efficient technique for detecting errors during digital data transmissions between a source and a destination. The destination device calculates the CRC of the received data. If the CRC calculated by the destination device does not match the one calculated by the source device, then the received data contains an error. This technique is used in a wide variety of applications from Ethernet transmission to daily file transfers. It provides quick and easy insurance of data integrity within digital communication systems The CRC is based on polynomial manipulations which treat each received message as a binary number. The received message is then divided by a fixed value, also known as the generator polynomial, using modulo-2 arithmetic. The characteristic of the CRC implementation is determined by the generator polynomial selection. The generator polynomials are selected to maximize the error detection capability without using too many resources. Generator polynomials that have been incorporated into standards such as CRC-8, CRC-16 and CRC-CCIT are commonly known and are well tested. This reference design describes the use of Lattice programmable devices to implement the CRC generator and checker. The design allows users to implement the CRC using different generator polynomials.

Features

  • Parameterized data width
  • Supports polynomial orders from CRC-1 to CRC-64
  • Supports both CRC generators and CRC checkers
  • Allows transposing of incoming data bytes, transposing CRC output bytes
  • Allows complement input data bytes and complement output CRC bytes

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Block Diagram

Cyclic Redundancy Check

Performance and Size

Tested Devices* Language Performance I/O Pins Design Size Revision
MachXO22 Verilog, VHDL >50MHz 44 26 LUTs 1.0
MachXO3 Verilog, VHDL >50MHz 44 25 LUTs 1.0

1. Use default settings: INPUT_DATA_WIDTH=8; CRC_WIDTH=16; INPUT_DATA_TRANSPOSE=0; CRC_TRANSPOSE=0; INPUT_DATA_COMPLEMENT=0; CRC_COMPLEMENT=0; POLYNOMIAL=0x8005.
2. Performance and utilization characteristics are generated using LCMXO2-1200HC-6TG144C with Lattice Diamond™ 1.2 design software.
3. Performance and utilization characteristics are generated using LCMXO640C-3T100C with Lattice Diamond 1.2 design software.

* May work in other devices as well.

Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Cyclic Redundancy Check Documentation
RD1105 1.0 4/15/2011 PDF 247.4 KB
Cyclic Redundancy Check Source Code
RD1105 1.0 4/15/2011 ZIP 175.5 KB

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