The high-speed SHA-3 IP core is designed for versatile support of all variants of the SHA-3 hash function and related extendable-output function SHAKE as well as the SHA-3 derived function cSHAKE and its variants KMAC, TupleHash, and ParallelHash (including their arbitrary-length output variantsThe high-speed SHA-3 is optimised for maximum speed and is optimal for applications that require high-speed hashing.
Versatile Algorithm Support: The IP core supports SHA-3-224/256/384/512, SHAKE-128/256, and SHAKE-128/256.
Secure Architecture: The execution time of the IP core is independent of the input values and, consequently, provides full protection against timing-based side-channel attacks.
Standard Compliance: The high-speed SHA-3 is compliant with FIPS 202 and SP 800-185. The IP core can be used as a part of numerous systems and protocols that require SHA-3 or its derivatives.
High throughput: The IP core offers very high throughput with high maximum clock frequency, achieving peak throughputs of several of Gbps depending on the target Lattice ® FPGA.
Easy Integration: The 64-bit interface of the IP core supports easy integration to various systems.