The compact SHA-3 IP core is designed for versatile support of all variants of the SHA-3 hash function and related extendable-output function SHAKE as well as the SHA-3 derived function cSHAKE and its variants KMAC, TupleHash, and ParallelHash (including their arbitrary-length output variants). Because of the versatile algorithm support, the compact SHA-3 can be used in various applications that require SHA-3 hashing or other supported SHA-3 based functionalities.
Versatile Algorithm Support: The IP core supports SHA-3-224/256/384/512, SHAKE-128/256, and SHAKE-128/256.
Secure Architecture: The execution time of the compact SHA-3 is independent of the input values and, consequently, provides full protection against timing-based side-channel attacks.
Standard Compliance: The IP core is compliant with FIPS 202 and SP 800-185. The IP core can be used as a part of numerous systems and protocols that require SHA-3 or its derivatives.
Minimal Resource Requirements: The IP core requires 1278 4LUTs with Lattice® ECP5® or 1245 6-input 4LUTs with Lattice® CertusPro-NX® and use only some internal memory blocks in a typical Lattice® FPGA implementation.
Easy Integration: The 64-bit interface of the IP core supports easy integration to various systems.