The HCC DMA IP core is a powerful PCIe DMA Engine with multiple industry standard AXI Interfaces. It is based on the Lattice PCIe HardIP.
Industry standard AXI Stream interfaces – Transfer data from FPGA to Host with s_axis interfaces and data from Host to FPGA with m_axis interfaces.
No PCIe protocol know-how required – User only transmits / receives payload data without the need to build PCIe TLPs .
Kernel mode driver and user mode library included – Ensure easy integration of the IP core into your SW application.