Multi-channel DMA Controller

During the holiday period (Dec 24 – Jan 4), response times from our Global Support Team may be longer than usual.


Newsletter Subscription

The Multi-Channel Direct Memory Access (MCDMA) Controller is designed to improve microprocessor system performance by allowing external devices to directly transfer information from the system memory. Memory-to- memory transfer capability is also supported.

The MCDMA Controller core supports two modes: 8237 and non-8237. When the 8237 mode is selected, it configures the core to be compatible with the Intel 8237A DMA Controller with a few variations. These variations are listed in the "Compatibility Differences with the 8237 Intel Device" section of the datasheet. The 8237 mode supports four independent channels while the non-8237 mode supports up to 16 independent channels.

Features

  • Selectable 8237 Mode
  • Configurable up to 16 Independent DMA Channels for Non-8237 Mode
  • Configurable Data Width of 8, 16, 32 or 64 Bits for Non-8237 Mode
  • Configurable Address Width of 16, 24 or 32 Bits for Non-8237 Mode
  • Configurable Word Count Register Width for Non-8237 Mode
  • Independent Auto-initialization of All Channels
  • Memory-to-Memory Transfers on Single, Block, and Demand Transfer Modes
  • Memory Block Initialization
  • Software DMA Requests

Jump to

Block Diagram

Multi-channel DMA Controller Block Diagram

Performance and Size

Evaluation Configurations Available for Series 4 ORCA FPGAs and FPSCs1
Parameter File Mode LUTs ORCA4 PFUs2 Registers External Pins fMAX (MHz) # of Channels Data Bus Width Address Bus Width Word Count Width
dma_mc_
o4_2_001.lpc		 8237 1258 200 524 59 58 4 8 16 16
dma_mc_
o4_2_002.lpc		 Non-8237 2661 499 1187 125 66 4 32 32 16

1 Performance and utilization characteristics are generated using OR4E02-2PBGAM680-DE in Lattice’s ispLEVERTM v3.0 SP1 software. Synthesized using Synplicity Synplify v.7.03. When using this IP core in a different density, package, speed, or grade within the ORCA family, performance may vary slightly.
2 PFU is a standard logic block of some Lattice devices. For more information, check the data sheet of the device.

Please contact your local Lattice sales office to obtain other evaluation configurations.

Evaluation Configurations Available for ispXPGA1
Parameter File Mode LUT42 ispXPGA PFUs2 Registers External Pins fMAX (MHz) # of Channels Data Bus Width Address Bus Width Word Count Width
dma_mc_
xp_2_001.lpc		 8237 1450 432 562 58 58 4 8 16 16
dma_mc_
xp_2_002.lpc		 Non-8237 3487 1072 1181 124 66 4 32 32 16

1 Performance and utilization characteristics are generated using LFX1200B-05F900C in Lattice’s ispLEVERTM v3.0 software. Synthesized using Synplicity Synplify v.7.03. When using this IP core in a different density, package, speed, or grade within the ispXPGA family, performance may vary slightly.
2 PFU is a standard logic block of some Lattice devices. For more information, check the data sheet of the device.

Please contact your local Lattice sales office to obtain dma_mc_xp_2_002 and other evaluation configurations.

Evaluation Configurations Available for LatticeECP and LatticeEC1
Parameter File Mode SLICEs LUTs Registers I/O fMAX (MHz) # of Channels Data Bus Width Address Bus Width Word Count Width
dma_mc_e2
_3_001.lpc		 8237 710 1087 551 59 72 4 8 16 16
dma_mc_e2
_3_002.lpc		 Non-8237 1633 2249 1181 125 86 4 32 32 16

1 Performance and utilization characteristics are generated using LFEC20E-4F672C in Lattice ispLEVER v.4.1 software. When using this IP core in a different density, package, or speed grade, performance may vary.

Evaluation Configurations Available for LatticeXP1
Parameter File Mode SLICEs LUTs Registers I/O fMAX (MHz) # of Channels Data Bus Width Address Bus Width Word Count Width
dma_mc_xm
_3_001.lpc		 8237 746 1287 555 59 71 4 8 16 16
dma_mc_xm
_3_002.lpc		 Non-8237 1794 3084 1179 125 80 4 32 32 16

1 Performance and utilization characteristics are generated using LFXP10E-4F388C in Lattice ispLEVER 5.0 software. When using this IP core in a different density, package, or speed grade, performance may vary.

Evaluation Configurations Available for LatticeSC1
Parameter File Mode SLICEs LUTs Registers I/O fMAX (MHz) # of Channels Data Bus Width Address Bus Width Word Count Width
dma_mc_sc
_3_001.lpc		 8237 717 1249 534 59 >100 4 8 16 16
dma_mc_sc
_3_002.lpc		 Non-8237 1744 2864 1179 125 >100 4 32 32 16

1 Performance and utilization characteristics are generated using LFSC3G!25E-5F900Cin Lattice ispLEVER 5.1 SP2 software. When using this IP core in a different density, package, or speed grade, performance may vary.

Ordering Information

  • Ordering Part Numbers:
    • For ORCA 4: DMA-MC-O4-N2
    • For ispXPGA: DMA-MC-XP-N2
    • For LatticeECP/EC: DMA-MC-E2-N3
    • For LatticeXP: DMA-MC-XM-N3
    • For LatticeSC: DMA-MC-SC-N3

To find out how to purchase the Multi-channel DMA Controller IP Core, please contact your local Lattice Sales Office.

Documentation

Quick Reference
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Multi-channel DMA Controller User's Guide
04.0 2/1/2006 PDF 252 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
IP Module Evaluation Tutorial
8/1/2004 PDF 216.1 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Evaluation Package for Multi-channel DMA Controller for ORCA 4 - Configuration 2
8/1/2003 ZIP 371.4 KB
Evaluation Package for Multi-Channel DMA Controller for LatticeECP/EC - Configuration 2
8/1/2004 ZIP 377.8 KB
Evaluation Package for Multi-channel DMA Controller for ORCA 4 - Configuration 1
8/1/2003 ZIP 249.2 KB
Evaluation Package for Multi-channel DMA Controller for ispXPGA - Configuration 1
8/1/2003 ZIP 755.5 KB
Evaluation Package for Multi-channel DMA Controller for ispXPGA - Configuration 2
8/1/2003 ZIP 1.5 MB
Evaluation Package for Multi-Channel DMA Controller for LatticeXP- Configuration 2
5/1/2005 ZIP 1.1 MB
Evaluation Package for Multi-Channel DMA Controller for LatticeXP- Configuration 1
5/1/2005 ZIP 971.1 KB
Evaluation Package for Multi-Channel DMA Controller for LatticeECP/EC - Configuration 1
8/1/2004 ZIP 250.2 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

ABOUT LATTICE

SALES

SUPPORT

FOLLOW