1Gb Ethernet PCS


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The GbE PCS Intellectual Property (IP) Core targets the programmable array section of the ORCA ORT42G5 FPSC and provides the PCS (Physical Coding Sub-layer) function.

Features

  • Complete 1Gb Ethernet Physical Coding Sublayer Solution Based on the ORCA® ORT42G5 Device
  • IP Targeted to the ORT42G5 Programmable Array Section Implements Functionality Conforming to IEEE 803.2-2002
    • Encoding/decoding for GMII data octets
    • Optional Auto-negotiation function with management registers and interface
    • External GMII interface or internal interface to single chip MAC and PCS implementation
  • Ethernet Functionality Supported by the Embedded Section of the ORT42G5, including:
    • Support for 8b/10b encoding/decoding
    • Serialization/deserialization of code groups for transmit/receive
    • Clock recovery from encoded data stream
  • Simulation Models and Test Benches

Jump to

Block Diagram

1GbE PCS Block Diagram

Performance and Size

Configuration PFUs Block RAM PLL LUTs Registers fMAX
1gbe_pcs_o4_1_001 157 4 2 622 605 125 MHz
tx_clk
rx_clk

Ordering Information

  • Ordering Part Number For ORCA 4 FPSC: 1GBE-PCS-O4-N1

To find out how to purchase the 1GbE PCS IP Core, please contact your local Lattice Sales Office.

Documentation

Quick Reference
Information Resources
Downloads
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1GbE PCS User Guide
11/1/2005 PDF 143.2 KB
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IP Module Evaluation Tutorial
8/1/2004 PDF 216.1 KB
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Evaluation Package for 1GbE PCS for ORCA 4
5/1/2004 ZIP 634.9 KB

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