DP8051CPU is an ultra high performance, speed optimized soft core of a single-chip 8-bit embedded controller dedicated for operation with fast (typically on-chip) and slow (offchip) memories. The core has been designed with a special concern about performance to power consumption ratio. This ratio is extended by an advanced power management unit PMU.
DP8051CPU soft core is 100% binary compatible with the industry standard 8051 8-bit microcontroller. There are two configurations of DP8051CPU: Harward where internal data and program buses are separated, and von Neumann with common program and external data bus. DP8051CPU has Pipelined RISC architecture 10 times faster compared to standard architecture and executes 85-200 million instructions per second. This performance can also be exploited to great advantage in low power applications where the core can be clocked over ten times more slowly than the original implementation for no performance penalty.
DP8051CPU is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC design flow.