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Application Notes

Designing a Page-Mode DRAM Controller Using MACH Devices
Published: 2/1/2002
Document Number AN006
ispMACH and MACH Endurance Characteristics
Published: 2/1/2002
ispMACH and MACH fmax Theory and Calculations
Published: 2/1/2002
ispMACH and MACH Switching Test Circuit
Published: 2/1/2002
MACH 4 Timing and High Speed Design
Published: 11/1/1998
Document Number TN002
MACH Power-up Reset
Published: 2/1/2002
Metastability in MACH Devices
Published: 2/13/2002
Document Number AN8060
Power Decoupling and Bypass Filtering for Programmable Devices
Published: 5/1/2004
Document Number TN1068
User Electronic Signature
Published: 2/1/2002

BSDL Models

[BSDL] M4LV-32/32 44 Pin PLCC
Published: 5/24/2001
[BSDL] M4LV-32/32 44 Pin TQFP
Published: 5/24/2001
[BSDL] M4LV-32/32 48 Pin TQFP
Published: 5/24/2001
[BSDL] M4LV-64/32 44 Pin PLCC
Published: 5/24/2001
[BSDL] M4LV-64/32 44 Pin TQFP
Published: 4/3/2000
[BSDL] M4LV-64/32 48 Pin TQFP
Published: 4/3/2000
[BSDL] M4LV-96/48 100 Pin TQFP
Published: 3/31/2000
[BSDL] M4LV-128/64 100 Pin PQFP
Published: 5/24/2001
[BSDL] M4LV-128/64 100 Pin TQFP
Published: 5/24/2001
[BSDL] M4LV-192/96 144 Pin TQFP
Published: 3/31/2000
[BSDL] M4LV-256/128 208 Pin PQFP
Published: 3/31/2000
[BSDL] M4LV-256/128 256 Ball BGA
Published: 3/31/2000

Data Sheets

MACH 4 Data Sheet
Published: 6/17/2010
Package Diagrams
Published: 8/23/2013

General Information

Third-Party Programmer Support for Lattice Devices
Published: 7/30/2008

Product Change Notification

PCN09A-10 Notification of Intent to Discontinue Select Mature Devices - Japanese Language
Published: 6/1/2010
PCN09I-10 Notification of Intent to Discontinue Select Mature Devices
Published: 9/7/2010