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ID: 7093
Case Type: faq
Category: Radiant
Related To:
Family: All FPGA

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Deployment Tool: Why does generated Rev D version of SVF (tester) in Deployment tool takes a long time to program on a device?

Description:
The Rev D option will generate an SVF file that complies with revision D of the SVF standard. The SVF file standard does not support looping / status polling. In order to achieve fast erase and programming times for our Flash devices, the tool uses a status polling (looping) algorithm to see when the erase (or program) operation is done. The SVF standard does not support this.

Solution:
By default, the tool generates a "Lattice Extended" SVF file that does support looping. Since the official SVF standard does not support looping, for the Rev D option, it is necessary to use the worst-case erase and programming times defined by device specifications.