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ID: 2069
Case Type: faq
Category: Lattice IP/Reference Design
Related To: PCIe
Family: LatticeECP3

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LatticeECP3: What is the usage of WB_CTI_I signal in the Lattice PCI Express Scatter Gather DMA Demo design?

WB_CTI_I is a Wishbone user defined signal for tagging the cycle as a single or burst access.
In the Lattice PCI Express Scatter Gather DMA Demo design, the signal is driven by the SGDMA IP (Wishbone master).
It is sourced by the EBR module (Wishbone Slave).