ispClock 5520 Evaluation Board

The ispClock Evaluation Board allows the designer to quickly configure and evaluate the ispClock5520 on a fully assembled printed-circuit board. The board features an ispPAC-CLK5520V-01T100C (20 outputs, 100-pin TQFP package), a header for user I/O, SMA connectors to selected high-speed I/O signals, LEDs for status indication, switches for added flexibility, and a JTAG interface for programming with the Lattice pDS4102-DL2A download cable (or Lattice flywire-based download cables).

Device Support

You will need the PAC-Designer software (version 3.0 or later) to use this board. PAC-Designer is available on a CD-ROM included with the kit, or can be downloaded from the Lattice web site.

Jump to

Kit Contents

The ispClock Evaluation Board is available in a Development Kit that includes:

  • ispClock Evaluation board
  • ispDOWNLOAD cable pDS4102-DL2A
  • PAC-Designer CD-ROM

The board is also available as a separate item.

Board Photos

Top View

Click image to enlarge

Ordering Information

  • This product is no longer available for purchase.

  • The information provided on here is for reference purposes only.
  • Contact your local Lattice sales representative for further information.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
ispClock5520 Evaluation Board ispPAC-CLK5520-EV1
AN6057 6/1/2004 PDF 504.6 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

Support

Technical Support

Need Help? We're Here to Assist You

Quality & Reliability

Reference Material to Help Answer Your Questions