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Lattice FPGAs Power Award-Winning Hyperloop & Motor Design

Lattice FPGAs Power Award-Winning Hyperloop & Motor Design
Posted 01/09/2023 by David Thomas, Roger Barton, and Hanno Hiss

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As the low power programmable leader, sustainability is a core guiding principle for product innovation at Lattice. Over the past few years, we’ve proudly partnered with Swissloop to support their Hyperloop research. It has been another year of milestones for the student organization. Read on for an update on the team’s 2022 program and award-winning work from Swissloop leaders, Roger Barton, and Hanno Hiss.

The Swissloop team
The Swissloop team

Swissloop is a student organization at ETH Zürich that is researching the Hyperloop technology and its applications in the real world. We have a history of success in the SpaceX Hyperloop competition and the European Hyperloop Week (EHW) in Valencia. With our latest Swissloop Pod "Lavinia Heisenberg" we were able to dust off two awards at the EHW in Delft, Netherlands: the Mechanical Subsystem Award for the best mechanical design of all prototypes presented and the Traction Award for the best drive system. The Pod not only transports cargo on a Hyperloop Pod for the first time, but also features an innovative linear reluctance motor and many other innovations.

Swissloop 21/22 Pod “Lavinia Heisenberg” at European Hyperloop Week 2022
Swissloop 21/22 Pod “Lavinia Heisenberg” at European Hyperloop Week 2022

One of the main conclusions from last year was to implement more inverter control functionality directly on an FPGA. In the end, we managed to fully operate the entire motor of 8–phases with a single FPGA by exploiting the large number of pins and huge level of parallelism possible. The final approach was to implement a hysteresis band controller with a very high control frequency. After the testing, we managed to sample the current with 1MSample/s and run our control loop at this frequency.

A fast reaction time in case of an error as well as synchronization of signals for EMC purposes made it more suitable for FPGAs to be applied in comparison to the microcontroller. During development of our controls, we made heavy use of testbenches, including implementing a co-simulation with our power electronics simulator PLECS and ModelSim Lattice-Edition. This allowed us to test the behavior of the controller in advance, including safety critical scenarios in case of false control. This saved a lot of testing time and enabled us to bring the new motor to life.

General purpose PCB equipped with the Lattice MachX03
General purpose PCB equipped with the Lattice MachX03

We also made use of the Lattice SPI IP to create a bidirectional communication with our microcontroller. With this we could set various configuration parameters after flashing the FPGA to quickly operate the pod in different modes. Even when scaling up to the entire motor, we had a lot of functionality on the chip and reached the capacity. Lattice was kind enough to send us a variant with more capacity which enabled us to run our controller without any hardware compromises.

Button layer of the PCB underneath the FPGA
Button layer of the PCB underneath the FPGA

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