A1 : The clock "ff_ebrd_clk_0" is the read clock of the Elastic Buffer in PCS. The clock "ff_rxiclk_ch0" is the read clock of the Down Sample FIFO in PCS.
A2 : In HD-SDI mode, the CTC is bypassed, so "ff_ebrd_clk_0" could be connected to '0'; the "ff_rxdata_ch0" is a 20-bit-width signal and the data written into the Down Sample FIFO is a 10-bit-width signal, so the "ff_rxhalfclk_ch0" could be connected to "ff_rxiclk_ch0".