RAM Type Interface for Embedded User Flash Memory

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LatticeReferenceDesign-Logo Select densities in the XO2 suite of products offer the user up to 256Kbits of User Flash Memory (UFM) that has write endurance of 100,000 cycles. This non-volatile memory can be used to store data that can be retrieved at a later. The UFM can be used as a general purpose Flash memory or data storage application which is not Write intensive. The EBR in the XO2 is more suited for scratch pad like applications. The XO2 UFM is an extension of the Embedded Functional Block (EFB) can be accessed by the user logic through the WISHBONE (WB) interface. The WISHBONE bus provides connectivity between the FPGA user logic and the EFB.

A WISHBONE master interface is required to interact with any WISHBONE slave interface. This reference design provides a ready to use RTL code segment that implements intuitive interface between the user logic and the UFM which requires no learning of the WISHBONE protocol. The reference design employs a byte addressable Dual-Port RAM (DP RAM) to exchange data between the user logic and the EFB. This greatly simplifies the command interface. One port of the DP RAM is accessible by the user and the other is accessed by the internal state machine.

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Block Diagram

RAM Type Interface for Embedded User Flash Memory (UFM)

Performance and Size

Device Family Tested Devices1 Language fmax I/O Pins Utilization Architectural Resources Revision
MachXO2™2 LCMXO2-1200ZE-3MG132C Verilog >50MHz 42 224 LUTs EFB & EBR 1.0

1 May work in other devices as well.

2 Performance and utilization characteristics generated using the specified test device and Lattice Diamond™ 1.4 software.

Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.


Technical Resources
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RAM-Type Interface for Embedded User Flash Memory – Source Code
FPGA-RD-02098 1.6 9/26/2021 ZIP 1.5 MB
RAM-Type Interface for Embedded User Flash Memory Reference Design – Documentation
FPGA-RD-02098 1.6 9/26/2021 PDF 1.7 MB

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