sysDSP Block

DSP Application Space Continues To Expand

The applications of Digital Signal Processing (DSP) continue to expand, driven by trends such as the increased use of video and still images and the demand for increasingly reconfigurable systems such as Software Defined Radio (SDR). Many of these applications combine the need for significant DSP processing with cost sensitivity, creating demand for high-performance, low-cost DSP solutions.

The LatticeECP2/M DSP Solution

The LatticeECP2/M FPGA devices consist of a low-cost FPGA fabric coupled with between three and twenty two sysDSP blocks. The sysDSP block in the LatticeECP2/M FPGA family supports four functional elements in three data path widths: 9, 18 and 36. The resources in each sysDSP block can be configured to support the following four elements:

• MULT
• MAC
• MULTADDSUB
• MULTADDSUBSUM

The number of elements available in each block depends upon the width selected from the three available options: x9, x18, and x36. A number of these elements are concatenated for highly parallel implementations of DSP. Each sysDSP block can be clocked at 375MHz yielding a total DSP capability of up to 63,000 Million Multiply accumulates per second (MMACs)!