Enhanced Configuration

Flexible Configuration Options

Each LatticeECP2/M device can quickly be configured using one of three different methods:

• From a low cost industry standard SPI Flash memory
• Using the device's serial or parallel microprocessor port
• Via the device's JTAG port

In addition to providing flexibility in terms of programming sources, the LatticeECP2/M devices also provide a number of enhanced configuration options as detailed below.

Dual Boot Operation

The LatticeECP2/M devices allow two images to be stored in sectors 0 and 1 of an SPI boot memory. The FPGA will first attempt to configure itself from sector 1. If this configuration fails, configuration will then be attempted from sector 0. (If the bitstream image is larger than one sector, a jump command can be used to span it across multiple sectors.) This dual image operation is ideal for situations where the configuration is to be changed in the field, as it enables a valid "golden configuration" to be held in memory at all times.

Bitstream Encryption

The LatticeECP2/M "S-Series" devices contain non-volatile memory elements that can be used for the storage of a 128-bit customer specific decryption key. Bitstream files can be encrypted with this key prior to programming into the configuration memory. As the encrypted bitstream enters the FPGA it is decrypted using the key stored on the device. This capability provides a method to combat design piracy and overbuilding.

TransFR I/O

LatticeECP2/M devices feature TransFR I/O that allows I/O states to be frozen during device configuration. This allows the devices to be updated in the field with a minimum of system disruption and downtime, allowing designers to meet the dual requirements of high system uptime, such as "5 nines" (99.999%) availability, and field updating of logic. The following diagrams show the four steps of achieving these updates using the TransFR I/O feature of the LatticeECP2/M.