Sign In         Korean language homepageChinese language homepage

LatticeECP2M PCI Express Development Kit

Documents & Downloads

Overview

Lattice Development Kits LogoLattice PCI Express Development Kits are solutions that enable designers to evaluate Lattice's PCI Express IP capabilities in a complete hardware/software development environment, modify and test different functionality, and then create new designs using a known good starting point.  The kits include several components to help accelerate quick prototype development, including a demo package with evaluation bitstreams, drivers, and GUI, RTL source for top-level project directories, documentation, and evaluation boards.  The LatticeECP2M PCI Express Development Kit solution is Lattice's first offering in a series of development kit solutions for the award-winning 90 nanometer LatticeECP2M FPGA device family.


Documentation

The following documentation is included in the LatticeECP2M PCI Express Development Kit.  Both Windows and Linux platforms are supported, and installation instructions are provided for each platform.  Lattice's PCI Express x1 / x4 ispLeverCORE is used as the basis of the development kit contents.  Using this IP core also requires installation of ispLEVER 7.0 SP2 with PLL Connectivity Update located here.  The LatticeECP2M PCI Express x4 Evaluation Board is required in order to run the demo, and is also included in the development kit.

Documentation

PDF file LatticeECP2M PCI Express Development Kit User's Guide
PDF file LatticeECP2M PCI Express 1.1 x1, x4 IP Cores User's Guide
PDF file
LatticeECP2M PCI Express x4 Evaluation Board User's Guide


PCI Express Endpoint IP Core Motherboard Plug-In Demo Description

Included within the development kit, the PCI Express (PCIe) Endpoint IP Motherboard Plug-In Demo shows the capabilities of Lattice's PCI Express cores to function in a PCIe slot within a Windows-based PC. The demo is simply, easy-to-use, and requires no test equipment or lengthy setup. 

The demo consists of hardware, IP, and software. It runs on standard LatticeECP2M PCI Express Evaluation Boards. A pre-configured bitstream is provided for the board.  The software includes a simple application along with an API and device drivers to enable the application to communicate with devices on  the evaluation board and demonstrate PCIe operation.

Device driver and application source code are available so a user can modify and extend the behavior of the tests or use them as a starting point for their own designs. The demo includes two modes of operation - a menu mode driven from a DOS window which includes configuration, read/write from/to register capability, memory access capability, some simple tests, and a graphics mode which includes the same capabilities.

PCIe Demo for LatticeECP2M

PCI Express Demo

Features

  • Reads and displays information about the PCIe core, including configuration registers, extended capability registers, and control registers
  • Performs GPIO register access
  • Performs memory access
  • Features:
    • LatticeECP2M device-specific bitstreams for PCI Express x1 and x4 endpoint IP cores
    • Motherboard Plug-In Demonstration software
    • Device drivers/API and GUI executable with source files
    • RTL source for top-level project directory
    • Integrated with the LatticeECP2M PCI Express x4 Evaluation Board

Development Kit Contents

The development kit is supported with either Windows or Linux platforms, and requires Lattice's ispLEVER 7.0 SP2 design tools, a PLL Connectivity Update, and an update to the Lattice OEM version of Mentor Graphics' ModelSim and Precision Synthesis.  It is available as CD bundle when ordered from Lattice or as downloadable zip files as shown below.  ispLEVER 7.0 SP2 software and the Mentor Graphics tool update are included in the CD bundle.


The demo software included with the development kit allows access to memory and registers on the board and provides real-time interaction with the evaluation board hardware to demonstrate a functional PCI Express communications path between the application and driver software (running on the PC CPU) and the FPGA IP core.  Device driver and application source code are available so you can modify and extend the behavior of the tests or use them as a starting point for new PCIe designs.

The PCI Express sample design supported by the demo package has a top-level RTL reference source file.  This top-level source file may be used as an instantiation template for the PCI Express IP core provided in the top-level directory (e.g. <project_dir>pcie_x1_eval<username>src tl op) of an actual design.

To install the development kit, simply download the appropriate CD files and unzip them.   The pre-configured bitstreams along with the demo are included, and must be loaded into the LatticeECP2M device.  Other Lattice tools that may be needed are ispVM® System software to download the bitstream, and ispLEVER® design tools if any changes to the design are to be made.  The application software and driver are also included and must be installed prior to running the demo.

WINDOWS:

The development includes two CDs for supporting the Windows platform.  The contents of each CD are provided below.

EXE files LatticeECP2M PCI Express Development Kit - PC CD1
EXE files LatticeECP2M PCI Express Development Kit - PC CD2

LINUX:

Linux platforms are supported by a separate executable, however the Mentor Graphics' updates on PC CD2 are also required.

EXE files LatticeECP2M PCI Express Development Kit - Linux CD
EXE files LatticeECP2M PCI Express Development Kit - PC CD2

Evaluation Board

The LatticeECP2M PCI Express Evaluation Board with a PCI Express x4 connector is included with the LatticeECP2M PCI Express Development Kit.