Platform Manager 2 & L-ASC10

Manage power, thermal & control planes in real time

Reduced time to market – Fast and reliable fault detection/logging for power & thermal management and board control logic, coupled with simulation and in-system debug support.

Simple, scalable, end-to-end – Scalable platform for voltage, temperature, logic and I/O that can be easily expanded using L-ASC10 chips with glue-less interfaces.

Reduce BOM and cost – Designs across a wide range of systems can standardize on the Platform Manager 2 family instead of multiple single function ICs from multiple vendors.

Features

  • Full fault coverage – monitor all rails and temperature nodes
  • Manage from 10 to 80 supplies using just the required number of L-ASC10 hardware management expanders
  • Minimize fault propagation by enabling individual hardware management sub-blocks (power, thermal & control path) to respond to faults in other blocks within nano-seconds
  • Save CPLD I/O pins by eliminating the need to monitor power-good signals of DC-DC converters
  • Reliable power & thermal fault detection in hardware, as opposed to software routines

Jump to

Family Table

Platform Manager 2 Family

Parameters L-ASC10 LPTM21 LPTM21L
Voltage Monitoring Inputs 10 10 10
Current Monitoring Inputs 2 2 2
Temperature Monitoring Inputs 2 2 2
Number of Trimming Channels 4 4 4
MOSFET Drivers 4 4 4
Open Drain GPIO (5 V Tolerant) 9 10 10
On-Chip Non-Volatile Fault Log Check Mark Check Mark Check Mark
Number of LUTs - 1280 1280
Digital I/O Count (PIO) - 98 33
Primary Clock Inputs (PCLK) - 6 4
Distributed RAM (kBits) - 10 10
EBR SRAM (kBits) - 64 64
Number of EBR Blocks (9 kBits) - 7 7
User Flash Memory (kBits) - 64 64
Number of PLLs - 1 1
Communication I/F I2C I2C / JTAG I2C / JTAG
Programming Interface I2C I2C / JTAG I2C / JTAG
Operating Voltage 3.3 V 2.8 V to 12 V 3.3 V
Insystem Update Support Check Mark Check Mark Check Mark
Analog / Digital I/Os
Package Options L-ASC10 LPTM21 LPTM21L
48-pin QFN (7 X 7 mm2) 22 / 9 - -
100-Ball caBGA (10 X 10 mm2) - - 22 / 43
237-Ball ftBGA (17 X 17 mm2) - 22 / 108 -

Example Solutions

Highly Scalable Hardware Management

  • Cut and paste solutions across a wide range of applications, and customize algorithms
  • Simplified board debug through an extensive suite of debug tools
  • Increased reliability with full fault coverage
  • Effortless integration of wide range of functions, such as temperature sense ICs, ADCs, reset generators, current sense ICs, and many digital buffers and controllers

Reduce CPLD I/O count

  • Save I/O pins by eliminating the need to monitor power-good signals of DC-DC converters as these status are available within the FPGA nodes
  • Save I/O pins that are used to monitor the power management circuitry control and monitor inputs
  • Save I/O pins used to communicate with microcontroller GPIO

Simplify thermal management by using PLD instead of software

  • Independent thermal faults detection in hardware as opposed to context switching software routines
  • Graceful degradation of services by combining the voltage and clock scaling with thermal faults
  • No need for thermal event communication between the CPLD and microcontroller

Reduce time to production - one design tool environment instead of 3 heterogeneous tools (Power Management GUI, VHDL/Verilog, C/ Assembly for microcontrollers)

  • Complete hardware management can be designed fully by either analog, or digital engineers, or both, using the LatticeDiamond Software through GUI or VHDL/ Verilog.
  • Fine tune power supply and reset sequencing without board modifications to enable reliable board start-up
  • Simulate the effects of different fault conditions (supply rail, thermal or control plane signals) using simple point-and-click software
  • Save development time and effort by reusing a single architecture for, scalable power management solution, scalable control plane function, thermal channels and interaction between them

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Adding Scalable Power and Thermal Management to ECP5 Using L-ASC10
AN6095 1.0 6/27/2017 PDF 3.4 MB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
AN6094 1.1 6/27/2017 PDF 2.1 MB
Dual Boot and Background Programming with PlatformManager 2
TN1284 1.2 3/1/2015 PDF 1.7 MB
Extending the VMON Input Range of Power/Platform Management Devices
AN6041 2.4 3/1/2016 PDF 1 MB
Fault Logging Using Platform Manager 2
TN1277 2.1 1/5/2018 PDF 3.5 MB
Implementing VID Function with Platform Manager 2
AN6092 1.2 9/8/2017 PDF 2.9 MB
Importing HDL Files With Platform Manager 2
TN1287 1.0 8/1/2014 PDF 546.9 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015 PDF 3.1 MB
Platform Manager 2 Hardware Checklist
TN1225 1.1 3/31/2015 PDF 775.1 KB
Platform Manager 2 PM Bus Adapter Usage
TN1297 1.0 2/11/2015 PDF 2.1 MB
Powering Up and Programming Platform Manager 2 and L-ASC10
AN6091 2.1 3/31/2015 PDF 2 MB
Temperature Monitoring and Fan Control with Platform Manager 2
FPGA-TN-02080 1.2 9/30/2018 PDF 2.6 MB
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017 PDF 734.6 KB
L-ASC10 Data Sheet
FPGA-DS-02038 1.8 9/30/2018 PDF 8.7 MB
Platform Manager 2 Data Sheet
FPGA-DS-02036 2.0 9/30/2018 PDF 11 MB
Package Diagrams
5.5 11/20/2017 PDF 13.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
L-ASC10 Data Sheet
FPGA-DS-02038 1.8 9/30/2018 PDF 8.7 MB
Platform Manager 2 Data Sheet
FPGA-DS-02036 2.0 9/30/2018 PDF 11 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Adding Scalable Power and Thermal Management to ECP5 Using L-ASC10
AN6095 1.0 6/27/2017 PDF 3.4 MB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
AN6094 1.1 6/27/2017 PDF 2.1 MB
Dual Boot and Background Programming with PlatformManager 2
TN1284 1.2 3/1/2015 PDF 1.7 MB
Extending the VMON Input Range of Power/Platform Management Devices
AN6041 2.4 3/1/2016 PDF 1 MB
Fault Logging Using Platform Manager 2
TN1277 2.1 1/5/2018 PDF 3.5 MB
Implementing VID Function with Platform Manager 2
AN6092 1.2 9/8/2017 PDF 2.9 MB
Importing HDL Files With Platform Manager 2
TN1287 1.0 8/1/2014 PDF 546.9 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015 PDF 3.1 MB
Platform Manager 2 Hardware Checklist
TN1225 1.1 3/31/2015 PDF 775.1 KB
Platform Manager 2 PM Bus Adapter Usage
TN1297 1.0 2/11/2015 PDF 2.1 MB
Powering Up and Programming Platform Manager 2 and L-ASC10
AN6091 2.1 3/31/2015 PDF 2 MB
Temperature Monitoring and Fan Control with Platform Manager 2
FPGA-TN-02080 1.2 9/30/2018 PDF 2.6 MB
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017 PDF 734.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Package Diagrams
5.5 11/20/2017 PDF 13.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager 2 Evaluation Board User Guide
EB93 1.0 7/30/2015 PDF 7.3 MB
Platform Manager 2 I2C Demo Design and GUI
UG59 1.1 8/11/2017 PDF 5.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO2/MachXO3/LPTM21 WISHBONE Flash Corruption Avoidance
PB1381 1.1 1/3/2017 PDF 88.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
PCN 09A-16_L-ASC10 I2C Datasheet
Data Sheet
PCN09A-16 6/13/2016 PDF 96.9 KB
PCN01A-15: LPTM20 Withdrawal
Data Sheet
PCN01A-15 4/28/2015 PDF 123.4 KB
PCN01A-18 - L-ASC10 and LPT2M Alternate Qualified Mask Set
PCN01A-18 A 4/18/2018 PDF 209.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
6.2 11/7/2018 ZIP 1000 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager 2 Brochure
I0236 2.0 4/21/2017 PDF 2.6 MB
Product Selector Guide
I0211 19.0 11/2/2018 PDF 8.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
FTG237_LPTM21
Rev C1 4/12/2018 PDF 22.6 KB
Lattice Platform Manager 2 Product Family Qualification Summary
Rev D 5/2/2018 PDF 1.2 MB
SN_SG48
Rev C 5/31/2018 PDF 140.8 KB
TG128_DD
Rev D 4/13/2018 PDF 22.1 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Revolutionary Hardware Management Solutions
WP0003 4.0 5/9/2018 PDF 1.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
LPTM21_ftbga237
1.0 12/1/2014 BSM 29.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] L-ASC10
1.0 8/20/2015 ZIP 16.7 KB
[IBIS] LPTM21
1.0 8/20/2015 ZIP 9.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Platform Manager 2 I2C GUI
1.1 10/7/2014 ZIP 3.3 MB


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